8085 MCQ - mcq for five unit PDF

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UNIT - I 1. 8085 microprocessor is an 8-bit microprocessor designed by? A. IBM B. Dell C. Intel D. VAX Ans : C Explanation: 8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit microprocessor designed by Intel in 1977. 2. In 8085, 16-bit address bus, which can address upto? A. 16KB B. 32KB C. 64KB D. 128KB Ans : C Explanation: In 8085, 16-bit address bus, which can address upto 64KB. 3. There are _______ general purpose registers in 8085 processor A. 5 B. 6 C. 7 D. 8 Ans : B Explanation: There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each register can hold 8-bit data. 4. It is also a 16-bit register works like stack, which is always incremented/decremented by 2 during push & pop operations. A. Stack pointer B. Temporary register C. Flag register D. Program counter Ans : A Explanation: Stack pointer : It is also a 16-bit register works like stack, which is always incremented/decremented by 2 during push & pop operations. 5. Flag register is an 8-bit register having __________ 1-bit flip-flops.

A. 3 B. 4 C. 5 D. 6 Ans : C Explanation: These are the set of 5 flip-flops : Sign (S), Zero (Z), Auxiliary Carry (AC), Parity (P) and Carry (C) 6. What is true about Program counter? A. It is an 8-bit register, which holds the temporary data of arithmetic and logical operations. B. When an instruction is fetched from memory then it is stored in the program counter C. It provides timing and control signal to the microprocessor D. It is a 16-bit register used to store the memory address location of the next instruction to be executed. Ans : D Explanation: Program counter : It is a 16-bit register used to store the memory address location of the next instruction to be executed. 7. This signal indicates that another master is requesting the use of the address and data buses. A. READY B. HOLD C. HLDA D. INTA Ans : B Explanation: HOLD : This signal indicates that another master is requesting the use of the address and data buses.

8. This signal is used as the system clock for devices connected with the microprocessor. A. X1, X2 B. CLK OUT C. CLK IN D. IO/M Ans : B Explanation: CLK OUT : This signal is used as the system clock for devices connected with the microprocessor. 9. Which of the following is true about Control and status signals?

A. These signals are used to identify the nature of operation. B. There are 3 control signal and 3 status signals. C. Three status signals are IO/M, S0 & S1. D. All of the above Ans : D Explanation: All of the above are correct about Control and status signals. 10. MVI K, 20F is an example of? A. Immediate addressing mode B. Register addressing mode C. Direct addressing mode D. Indirect addressing mode Ans : A Explanation: Immediate addressing mode : In this mode, the 8/16-bit data is specified in the instruction itself as one of its operand. For example: MVI K, 20F: means 20F is copied into register K. 11) An instruction essentially consists of an a) Operation code b) Address of the data c) Instruction operates d) None of the above. 12) The 8085A has interrupt pins:a) TRAP, RST7.5 b) RST6.5, RST5.5 c) TNTR(pin 10) d) All of the above. 13) The registers available to the user can be further classified into:a) General purpose register b) Special-purpose register c) None of these d) All of the above. 14) In the 8085A microprocessor, the data size is 8-bit and the address size is 16-bit. a) B-C pair b) D-E pair c) H-L pair d) All of the above. 15) Set of registers provided for some special applications. a) Accumulator b) Memory space c) All of the above d) None of the above.

16) A microprocessor to execute a program, the CPU has to do the following operations: a) Fetch the opcode b) Read a memory location for the data. c) Perform the required operation d) All of the above. 17) An instruction cycle can be defined as the sum of an instruction fetch time and the instruction execution time. a) Instruction cycle=Instruction fetch + Instruction execute. b) Memory location and deposited in the CPU’s c) Both of these d) None of the above. 18) A group of ___ bits is called byte. A) 2 B) 4 C) 6 D) 8 19) The single IC which consists of ALU, control section, and register section is called___. A) Microprocessor B) Microcontroller C) Register D) Computer 20) A system bus which carries, only the control and timing signals then it is called as ____ A) Address bus B) Data bus C) Control bus D) None of the above 21) 8085 has a) One 16-bit register b) Two 16-bit register c) Three 16-bit register d) Four 16-bit register. 22) Interrupts can be generally classified : a) Hardware interrupts b) Software interrupts c) Both of above d) All of the above. 23) 8085 microprocessor has 5 hardware interrupts : a) TRAP, RST6.5 b) RST7.5, RST5.5 c) INTR d) None of the above.

UNIT - II 1. Which of the following is not an instruction of 8051 instructions? a) arithmetic instructions b) boolean instructions c) logical instructions d) none View Answer Answer: d Explanation: The 8051 instructions are categorized as 1. Data transfer instructions 2. Arithmetic instructions 3. Logical instructions 4. Boolean instructions 5. Control transfer instructions. 2. The operations performed by data transfer instructions are on a) bit data b) byte data c) 16-bit data d) all of the mentioned View Answer Answer: d Explanation: The data transfer instructions implement a bit, byte, 16-bit data transfer operations between the SRC(source) and DST(destination) operands. 3. Which of the following is true while executing data transfer instructions? a) program counter is not accessible b) restricted bit-transfer operations are allowed c) both operands can be direct/indirect register operands d) all of the mentioned View Answer Answer: c Explanation: In data transfer instructions, 1. Program counter is not accessible. 2. Restricted bit-transfer operations are allowed. 3. Both operands can be direct/indirect register operands. 4. BOth operands can be internal direct data memory operands. 4. The logical instruction that affects the carry flag during its execution is a) XRL A; b) ANL A; c) ORL A;

d) RLC A; View Answer Answer: d Explanation: The logical instructions that doesn’t affect the carry flag are, ANL, ORL and XRL. The logical instructions that affect the carry flag during its execution are RL, RLC, RRC and RR. 5. The instruction that is used to complement or invert the bit of a bit addressable SFR is a) CLR C b) CPL C c) CPL Bit d) ANL Bit View Answer Answer: c Explanation: The instruction, CPL Bit is used to complement or invert the bit of a bit addressable SFR or RAM. 6. The instructions that change the sequence of execution are a) conditional instructions b) logical instructions c) control transfer instructions d) data transfer instructions View Answer Answer: c Explanation: The control transfer instructions transfer the control of execution or change the sequence of execution conditionally or unconditionally. 7. The control transfer instructions are divided into a) explicit and implicit control transfer instructions b) conditional and unconditional control transfer instructions c) auto control and self control transfer instructions d) all of the mentioned View Answer Answer: b Explanation: The control transfer instructions are divided into conditional and unconditional control transfer instructions. 8. The conditional control transfer instructions check a bit condition which includes any bit of a) bit addressable RAM b) bit addressable SFRs c) content of accumulator d) all of the mentioned View Answer

Answer: d Explanation: The conditional control transfer instructions check a bit condition which includes any bit of bit addressable RAM or bit addressable SFRs or content of accumulator for transferring the control to the specified jump location. 9. All conditional jumps are a) absolute jumps b) long jumps c) short jumps d) none View Answer Answer: c Explanation: All conditional jumps are short jumps. 10. The first byte of a short jump instruction represents a) opcode byte b) relative address c) opcode field d) none View Answer Answer: a Explanation: The short jump instruction has two byte instruction. The first byte represents opcode byte and second byte represents an 8-bit relative address. 11. In logical instructions, the immediate data can be an operand for a) increment operation b) decrement operation c) single operand instruction d) none View Answer Answer: d Explanation: In logical instructions, the immediate data can’t be an operand for increment/decrement or any other single operand instruction.

12. Assembler is a type of translator that translates ___ language into machine level language. A) High Level B) Assembly level C) Both A and B D) None of the above 13.___ instructions are used in such cases when some instructions are needed to be executed number of times to perform certain tasks. A) Jump B) Loop

C) Shift D) Rotate 14. The Stack follows the sequence a) first-in-first-out b) first-in-last-out c) last-in-first-out d) last-in-last-out View Answer Answer: c Explanation: The stack follows last-in-first-out sequence. 15. If the processor is executing the main program that calls a subroutine, then after executing the main program up to the CALL instruction, the control will be transferred to a) address of main program b) subroutine address c) address of CALL instruction d) none of the mentioned View Answer Answer: b Explanation: Since subroutine is called, to start the execution of the subroutine, the control is transferred to the subroutine address. 16. The stack is useful for a) storing the register status of the processor b) temporary storage of data c) storing contents of registers temporarily inside the CPU d) all of the mentioned View Answer Answer: d Explanation: Stack is used for temporary storage of contents of registers and memory locations, status of registers. 17. The Stack is accessed using a) SP register b) SS register c) SP and SS register d) None of the mentioned View Answer Answer: c Explanation: The stack is accessed using a pointer that is implemented using SP and SS registers.

18. As the storing of data words onto the stack is increased, the stack pointer is a) incremented by 1 b) decremented by 1 c) incremented by 2 d) decremented by 2 View Answer Answer: d Explanation: The data is stored from top address of the stack and is decremented by 2. 19. While retrieving data from the stack, the stack pointer is a) incremented by 1 b) incremented by 2 c) decremented by 1 d) decremented by 2 View Answer Answer: b Explanation: The data in the stack, may again be transferred back from a stack to register. At that time, the stack pointer is incremented by 2. 20. The process of storing the data in the stack is called ……… the stack. a) pulling into b) pulling out c) pushing into d) popping into View Answer Answer: c Explanation: The data is pushed into the stack while loading the stack. 21. The reverse process of transferring the data back from the stack to the CPU register is known as a) pulling out the stack b) pushing out the stack c) popping out the stack d) popping off the stack View Answer Answer: d Explanation: The data retrieved from stack is called popping off. 22. In 8085, the DAA instruction is used for a.Direct Address Accumulator b.Double Add Accumulator c.Decimal Adjust Accumulator

d.Direct Access Accumulator Answer. c UNIT - III 1) 8085 has 5 addressing mode and are:a) Immediate, inherent b) Direct c) Register and register indirect d) All of the above. 2)In an intel 8085, which is the first machine cycle of an instruction? A. An op-code fetch cycle B. A memory read cycle C. A memory write cycle D. An I/O read cycle

3) One of the following addressing modes is not possible in 8085. a) Indexed addressing b) Indirect addressing c) Direct addressing d) Indirect register address. 4) _____ addressing mode is most suitable to change the normal sequence of execution of instructions. a) Relative b) Indirect c) Index with Offset d) Immediate 5) The instruction, Add #45,R1 does _______ a) Adds the value of 45 to the address of R1 and stores 45 in that address b) Adds 45 to the value of R1 and stores it in R1 c) Finds the memory location 45 and adds that content to that of R1 d) None of the mentioned 6) In ___ addressing mode the operands are specified in the instruction itself. A) Immediate B) Register C) Direct D) Indirect 7) How many T-states are required for execution of OUT 80H instruction? A) 10 B) 13 C) 16 D) 7

8) Machine cycles in the “CALL” instruction of microprocessor 8085 CPU are a. six b. five c. four d. two 9) Machine cycles for IN instructions in microprocessor are a. Eight b. five c. four d. three 10) How many T-states would be required for the execution of CALL 2000 H instruction? a. 10 b. 13 c. 18 d. None of these 11) Which one of the following is the software interrupt of 8085 ? a. RST 7.5 b. EI c. RST 1.0 d. TRAP 12) Which one has the highest priority out of these a. TRAP b. RST 7.5 c. RST 6.5 d. HOLD 13) Which one is hardware type interrupt? a. INTA b. TRAP c. RST d. INT Answer – (2) 14. In 8085 microprocessor, which one is the non-maskable interrupt? a. RST 7.5 b. TRAP c. HOLD d. INTR Answer – (2) 15. Machine cycles in the “CALL” instruction of microprocessor 8085 CPU are a. six b. five c. four d. two Answer – (2) 16. In 8085 Microprocessor, the interrupt TRAP is

a. Every time maskable b. not interrupted by a service subroutine c. Used for short-term power failure d. Lowermost priority interrupt Answer – (3) 17. RST 7.5 interrupt act as a. Vectored and Maskable type b. Vectored and non-maskable type c. Direct and maskable type d. Direct and non-maskable type Answer – (1) 18. No of hardware interrupt request, a solitary interrupt- controller namely IC8259A could process? a. Eight b. Nine c. Sixteen d. Sixty four Answer – (1) 19. The interrupt mask in the 8085 microprocessor is set or reset by the software instruction a. By the EI interrupt b. By the DI interrupt c. By the RIM interrupt d. By the SIM interrupt Answer – (4) 20. For 8085, The vector address corresponding to software interrupt RST 7.0 is a. 0017 Hex b. 0027 Hex c. 0038 Hex d. 0700 Hex Answer – (3) UNIT – IV

1) The part of 8255 can be programmed for any other mode by writing a single control word into the a) Port b) Control Logic c) Set/Reset d) Register. 2) In context of 8255 BSR stands for___. A) Bit Set Register B) Bit-Set Reset C) Binary Set Register D) Binary Set-Reset 3) In 8255-PPI ___ mode is used as two simple 8 bit I/O ports and port C as two 4-bit I/O ports. A) Mode 0

B) Mode 1 C) Mode 2 D) Mode 3

4) How many types of Interfacing? A. 2 B. 3 C. 4 D. 5 Explanation: Interface is the path for communication between two components. Interfacing is of two types, memory interfacing and I/O interfacing. 5) The ______ is a general purpose programmable I/O device designed to transfer the data from I/O to interrupt I/O.

A. 8285A B. 8241A C. 8255A D. 8251A Explanation: The 8255A is a general purpose programmable I/O device designed to transfer the data from I/O to interrupt I/O 6. How many ports 8255A has? A. 2 B. 3 C. 4 D. 5 Explanation: 8255A has three ports, i.e., PORT A, PORT B, and PORT C. 7. Which port can be split into two parts? A. PORT A B. PORT B C. PORT C D. PORT D Explanation: Port C can be split into two parts, i.e. PORT C lower (PC0-PC3) and PORT C upper (PC7-PC4) by the control word.

8. Which of the following are Features of 8255A? A. It consists of 3 8-bit IO ports i.e. PA, PB, and PC. B. Address/data bus must be externally demux'd. C. It is TTL compatible. D. All of the above Explanation: All of the above are Features of 8255A. 9. Which of the following steps detects the key in a 4*4 keyboard matrix about the key that is being pressed? a) masking of bits b) ensuring that initially, all keys are open c) checking that whether the key is actually pressed or not d) all of the mentioned 10. To detect that in which column, the key is placed?

a) we can mask the bits and then check it b) we can rotate the bits and then check that particular bit which is set or reset(according to the particular condition) c) none of the mentioned d) all of the mentioned

11. In reading the columns of a matrix, if no key is pressed we should get all in binary notation

a) 0 b) 1 c) F d) 7 12. To identify that which key is being pressed, we need to: a) ground all the pins of the port at a time b) ground pins of the port one at a time c) connect all the pins of the port to the main supply at a time d) none of the mentioned 13. Key press detection and Key identification are: a) the same processes b) two different works are done in Keyboard Interfacing c) none of the mentioned d) any of the mentioned 14. For writing commands on an LCD, RS bit is a) set b) reset c) set & reset

d) none of the mentioned View Answer Answer: b Explanation: For writing commands on an LCD, RS pin is reset. 15. Which instruction is used to select the first row first column of an LCD? a) 0x08 b) 0x0c c) 0x80 d) 0xc0 View Answer Answer: c Explanation: 0x80 is used to select the first row first column of an LCD. 16. The RS pin is _________ for an LCD. a) input b) output c) input & output d) none of the mentioned View Answer Answer: a Explanation: The RS pin is an input pin for an LCD. 17. How can we control the speed of a stepper motor? a) by controlling its switching rate b) by controlling its torque c) by controlling its wave drive 4 step sequence d) cant be controlled View Answer Answer: a Explanation: Speed of a stepper motor can be controlled by changing its switching speed or by changing the length of the time delay loop. 18. The RPM rating given for the DC motor is for? a) no-loaded b) loaded c) none of the mentioned d) all of the mentioned View Answer

Answer: a Explanation: RPM rating given for a DC motor is for a no-loaded condition. 19. How can we change the speed of a DC motor using PWM? a) By changing amplitude of PWM b) By keeping fixed duty cycle c) By changing duty cycle of PWM d) By increasing power of PWM View Answer Answer: c Explanation: We can change the speed of a DC motor using PWM by changing the duty cycle of PWM. Changing duty cycle means changing ON and OFF timing of PWM. Even if amplitude of PWM is fixed by increasing the ON time of PWM increases the speed of the DC motor. 20. How can the direction of the DC motor be changed? a) by changing the torque b) by changing the switching speed c) by changing the polarity of voltages connected to the leads d) by changing the RPM rating View Answer Answer: c Explanation: The direction of the DC motor can be changed by changing the polarity of the voltages connected to its leads.

UNIT – V 1. Why two pins for ground are available in ADC0804? a) for controlling the ADCON0 and ADCON1 register of the controller b) for controlling the analog and the digital pins of the controller c) for both parts of the chip respectively d) for isolate analog and digital signal View Answer Answer: d Explanation: Two grounds are available in ADC0804 to isolate analog signal from digital signal. This isolation provides accuracy in digital output. 2. What is the function of the WR pin? a) its active high input used to inform ADC0804 to the end of conversion b) its active low input used to inform ADC0804 to the end of conversion c) its active low input used to inform ADC0804 to the start of conversion

d) its active high input used to inform ADC0804 to the start of conversion View Answer Answer: c Explanation: WR is active low input used to inform the ADC0804 to start the conversion process. 3. State which of the following statements are false? a) CLK IN pin used for External Clock Input or Internal Clock with external RC element b) INTR pin tells about the end of the conversion c) ADC0804 IC is an 8 bit parallel ADC in the family of the ADC0800 series d) None of the mentioned View Answer Answer: d Explanation: CLK IN pin is used to tell about the conversion time, INTR pin tells about the end of the conversion and ADC0804 has a resolution of 8 bits only so all three statements are true. 4. While programming the ADC0808/0809 IC wha...