Analog IC Design lecture 8 Noise Amplifiers PDF

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Analog and Mixed-Signal Integrated Circuit Design Amplifiers

Viola Schäffer

Course content 1.

Ralf Brederlow - 3 Lectures:

a.

IC Device physics and IC processing

b.

Device Modeling

c.

Component non-idealities

d.

Basics of manufacturing and circuit modeling

2.

3.

Misha Ivanov – 3 Lectures:

a.

Introduction to switched-capacitor circuits (discrete time)

b.

Introduction to ADC and DACs

c.

ADC basics: Flash, pipeline, SAR, oversampling

d.

DAC basics: String, R2R, oversampling

Martijn Snoeij & Viola Schäffer – 6 lectures

a.

Ideal opamps and basic opamp configurations

b.

Amplifier stages and current mirrors

c.

4.

Stefan Herzer – 3 lectures:

a.

overview of linear, capacitive, inductive and hybrid power conversion

Basic Opamp design

b.

charge pumps

d.

Frequency compensation

c.

buck and boost converter control

e.

Amplifier Noise analysis

d.

integrated power management circuits

f.

Advanced gain stages and current mirrors

g.

Bandgaps 2

Recall | Important Amplifier Parameters POWER

SIZE, COST

NOISE BANDWIDTH

3

Direct Comparison | Almost Impossible Multiple Figure of Merits (FOM) FOM

∙∙  ∙

FOM

Instrumentation Amplifier Example

∙ 

4

Accuracy / Precision / Resolution I

https://meettechniek.info/measurement/accuracy.html

Accuracy is a measure of “trueness”, while precision is a measure of variability. They are not necessarily correlated! 5

Accuracy / Precision / Resolution II

Resolution is the ability of the measurement system to detect and faithfully indicate small changes in the characteristic of the measurement result. 6

Accuracy / Precision / Resolution III Examples:  Accuracy - Offset error - Gain error  Precision - Noise  Resolution - # of bits

7

Amplifier | DC Error sources Specifications:  VOS: 200uV  AOL: 100dB (10uV/V)  CMRR: 100dB  PSRR: 100dB  VNOISE@1KHz: 20nV/rtHz Conditions:  Measurement bandwidth: 1MHz  Gain:50  Temperature variation: 50C  Common mode variation: 5V  Supply variation: 1V 8

Amplifier | Timing Error Sources The time after an event before an accurate sample can be taken will depend on slewrate, bandwidth and phase margin.

“wasted” time 9

Most Powerful Tools for Optimization  Topology / bias / device size choice Selecting the right circuit topology, DC bias levels and proper device sizing

 Process Semiconductor processes are optimized differently. Some offer different device types, more precision, higher voltage, lower noise or matching.

 Feedback Apply feedback to control important parameters. This can eliminate process and temperature variations.

 Layout A careless layout can ruin performance.

Noise in Amplifiers

11

What is noise? Noise is random process/signal, meaning:  Cannot predict exact future signal value from past values  In electronics, with inherent noise, random processes are meant that are caused by undesired physical mechanism, NOT deterministic signals caused by crosstalk, interference, etc. etc.  i.e. noise is always unwanted, but not all unwanted signals are noise…

 Inherent noise can be significantly reduced through proper circuit design, such as device size, power levels, circuit topology and process choice.

12

Quantifying Noise Noise is random in nature. Its instantaneous value cannot be predicted, but statistics can be used to quantify it.  To quantify the average noise power the rms (root mean square) value is defined as:

 Using this the normalized noise power of a signal (normalized to a 1 ohm resistor):

Pav 

V n2( rms 1

)

 V n2( rms )

 The signal to noise ratio (SNR) of a system is defined as:

13

Noise Power Spectral Density (PSD)

To get power value – integrate over frequency:

V n2( rms ) 





0

v 2n  f df

Noise can be filtered – LPF reduces the total noise 14

Integrating voltage/power spectral density  Noise power is expressed as V2  Noise power spectral density is expressed as V2/Hz  Voltage noise (root spectral density) unit is V/Hz  Watch out: when integrating noise density over bandwidth to get total noise, need to use noise power!  Example: A white noise source with voltage density 4nV/Hz is filtered by a perfect (brick) low-pass filter with a cut off of 20kHz. What is the rms noise voltage at the filter output?

15

Example | Integrating white noise density A white noise source with voltage density 4nV/Hz is filtered by a perfect (brick) low-pass filter with a cut off of 20kHz. What is the rms noise voltage at the filter output?

 Good:

7nV/Hz = 49  10-18 V2/Hz V2 = 4910-18  20000 = 9.8 10-13 V2 Vrms = (9.8 10-13 V2) = 990nV

 Good:

Vrms= 7nV/ Hz  (20kHz) = 990nVrms

 BAD:

Vrms= 7nV/ Hz  20kHz = 140uVrms 16

Noise Bandwidth Calculation  Noise can be reduced by filtering  Noise above the filter bandwidth is averaged out to 0  Previous example used a “perfect brick” filter for the BW value – but they don’t exist  Depending on the order of filtering used the bandwidth value needs to be adjusted by a correction factor.  Most common correction factor value is /2 for a single pole filter Texas Instruments: Analog Engineer’s Pocket Reference 17

Amplifier | Noise Calculation Example

18

Integrating 1/f noise density  Calculate the total noise between 0.1 Hz to 10Hz: _.  90 ∙ 10  ∙ 

 .

_.  193 _.  193 ∙ 6.6  1.3 Normalized 1/f noise at 1Hz

Texas Instruments: Analog Engineer’s Pocket Reference 19

Adding multiple Noise sources

 Two noise sources can be added such:  In case of two uncorrelated signals (as most inherent noise sources in an amplifier): 󰇛󰇜 

󰇛󰇜   󰇛󰇜   󰇛󰇜 

Importance of smaller number quickly vanishes! 10  5  3   11.57 D. A. Johns; K. Martin; Analog Integrated Circuit Design

20

Noise | Types  Noise limits achievable resolution  Most common types of noise are:  Thermal (white) noise  Flicker (1/f) noise  Shot noise  Burst (popcorn) noise

Corner frequency

 Thermal noise can be averaged out  Flicker / burst noise are very similar mechanisms. They both increase in amplitude with lowering frequency: therefore pose a fundamental limit to resolution

Burst (popcorn) noise 21

Noise Mechanisms

http://www.d.umn.edu/~htang/ECE5211_doc_files/ECE5211_files/Chapter9.pdf 22

Circuit elements and their noise models

* D.A. Johns and Ken Martin: Analog Integrated Circuit Design; Chapter 4

23

Example | Noise Optimization

* *

To get the lowest noise:  Maximize gm: high bias current + weak inversion

    

 Maximize WL for 1/f noise – big transistor, parasitic C  In strong inversion there are conflicting requirements (W/L vs WL)  Maximize (!) RD (upper limit set by ro) 24

Recall | MOSFET transconductance  Strong inversion – increases linearly with VGS – V TH and as the square root of IDS – V dsat >> Vt   

 Sub-threshold – gm almost same equation as for a BJT – Great for input diffpair! – But fT drops due lower mobility



g mFET 

2 I ds V dsat

g mBJT 

IC Vt

 25.8mV@roomtemp

Transconductance to Drain Current Ratio

25

Input Referred Noise  Consider multiple gain stages with their noise contribution  Can represent with a single gain stage and equivalent noise source Vno2

Vno1

Vno1

Vni1

Vno2

Vni1

󰇛󰇜 

1 ∙ 󰇛2 ∙ 10󰇜 0.8 ∙ 󰇛10󰇜

󰇛󰇜  1.08

󰇛󰇜 

0.8 ∙ 󰇛10 ∙ 2󰇜 1 ∙ 󰇛2󰇜 

󰇛󰇜  0.81

Preferred - lower noise for same power 26

Noise | Amplifier Representation  For noise analysis combine voltage and current noise contributors into input referred voltage and current noise source

 If input transistors dominate on a CMOS amplifier we can use below equations to estimate noise level: In strong inversion:

g m  2 nC ox

W ID L

󰇛∗󰇜

Thermal noise:

 

2 4 3

Flicker noise:

 

 1   

Shot noise:

 

2

(*) As discussed in Lecture 2 the 2/3 factor holds only for older technology nodes. For deep-submicron devices the modification factor can be substantially larger. 27

Noise | Amplifier  Noise is inversely proportional to bias current (power)  Input stage dominates noise performance  Output stage contribution is divided by the gain of the input stage and therefore negligible in most cases  Optimize input devices as in CS amplifier example  To reduce the number of noise contributors and therefore overall noise must lower gmmir (gmin > gmmir)  Size current mirror (increase L)  Degeneration resistor 28

Noise | Amplifier - Tips v n2 IN 

8 kT 3 g m1

 1  

 p W 3 L1  2K N   n W 1 L 3  C ox WL 1 f

 K   K 

 N  P

p n

L12 2 L3

   

 Use large W and short L for the M1/M2 (increase gm)  Select M3/M4 with long L (low gm) and keep W*L large for low flicker noise  Use small cascodes to increase gain and lower parasitic cap on the output

 P-channel transistors have lower flicker noise coefficient and lower mobility:  Use p-channel input differential pair for lower flicker noise

29

Exercise 1: integrating 1/f noise  Remember, 1/f noise can be described as: V n2 

K 1 1  K' C ox WL f f

 On an actual TI amplifier, where overall 1/f noise is dominated by input transistors, we established that K’ is 3.8*10-16 

 Calculate the noise from 0.1 to 10Hz (in rms and pp)

 .

 4.605

 For f -> 0, the noise density increases to infinity. This may lead to the assumption that the integrated amount of noise becomes very large, if we included low enough frequencies. Assuming that the amplifier has a 10 year lifetime, what is the integrated amount of 1/f noise from (1/10years) to 10Hz? 30

Exercise 1: integrating 1/f noise  Remember, 1/f noise can be described as: V n2 

K 1 1  K' C ox WL f f

 On an actual TI amplifier, where overall 1/f noise is dominated by input transistors, we established that K’ is 3.8*10-16  Calculate the noise from 0.1 to 10Hz (in rms and pp)  For f -> 0, the noise density increases to infinity. This may lead to the assumption that the integrated amount of noise becomes very large, if we included low enough frequencies. Assuming that the amplifier has a 10 year lifetime, what is the integrated amount of 1/f noise from (1/10years) to 10Hz?



 .

3.8 ∙ 10  19.5

 4.605

_.  19.5 ∙ 10  ∙ 

 .

_.  89.8 _.  89.8 ∙ 6.6  0.6



   ∗∗∗∗

 21.9

~ 4.76x higher

31

@ Home Exercise: Gain: VOUT/VIN1 VOUT/VIN2 VOUT/REF VOUT/(VIN2-VIN1) Total Noise contribution from resistors Total Noise contribution from reference (use http://www.ti.com/lit/ds/symlink/ref2030.pdf) Total Noise contribution from amplifier (use http://www.ti.com/lit/ds/symlink/opa192.pdf) Assume measurement bandwidth ½ of amplifier bandwidth (in the gain used) http://www.ti.com/lit/an/slva043b/slva043b.pdf 32

Capacitors and Inductors  Capacitors and inductors do not generate noise but they accumulate noise generated by other elements connected  RC example:

Depends only on cap value!

 Similarly for inductors: 󰇛󰇜  

  33

Advanced gain stages / improvements

34

Amplifier | Basic topology | Limitations  Common mode limit to positive supply [VINCM < VDD-VDSAT-VGS]  Common mode limit to negative supply [VINCM > VSS+VDSAT]  Output current source capability [Iout] – power inefficient  Limited common mode rejection [rds5]  Open loop gain limited by [rds2||rds4]

35

Amplifier | Implementation | Simulation Modest open loop gain

Despite high supply current cannot drive 10KOhm to rail 36

Amplifier | 2 Stg | Folded cascode | Class AB Fold improves negative common mode compliance

Cascode increases output impedance / gain

 ≈100dB gain possible  Rail-Rail output  Offset determined by input transistors + load and mirror  CMRR/PSRR by input stage current sources  Input CM range includes negative rail  On positive side limited to VDD – (Vgs+Vsat)  Solution: add another Output current input pair control

37

Input Stage | To Improve CMIR

 Rail to rail input range possible. Current can be recycled. 38

Improve output impedance | Boost Gain      (1+A) Derive as an exercise

39

Improve output impedance | Boost Gain

M0

M1 V0

in

M2

M3

I0

I1

M4

out

40

Input Stage | To Improve AOL

 Use gain boost to further increase output impedance and gain of input stage. 41

Improve output impedance | Boost Gain

 Multiple gain stages can be cascaded for additional impedance / gain  Impact ionization (leakage to bulk) can limit theoretical limit 42

Input Stage | To Improve CMRR  Adding feedback (gain boost) to the tail current cascode improves output impedance of current source and eliminates its dependency with common mode  Also improves current source compliance

43

Output Stage | Class AB control Can source and sink current significantly higher than bias current

Determines worse case load cap stability 44

Increase Slewrate | Dynamic Current Bias

45

Increase Slewrate | Dynamic Current Bias

ed M5 loose current 46

Offset Voltage and Drift

f

signal

*

common mode

t

Small signals Large disturbances

offset

noise

AMP

Amplifier errors

Limit possible gain and resolution 47

Analog Trim    

Change size of input transistors (least convenient) Change size of folded cascode transistors Change values of the folded cascode resistors Add/subtract currents in folded cascode g needs a memory element: ROM; fuse; resistor cut; zener

48

Auto-Zero

 Offset is stored on capacitor during 2  It is subtracted from the input during 1  Signal transfer only during 1!  Not only offset but noise of amplifier is sampled – effectively increasing low frequency noise

49

Chopper Stabilization  The offset is modulated to a high (chopping) frequency where it can be filtered out  Signal is reconstructed after 2nd chopping switch and therefore remains continuous  1/f noise is also eliminated  Can create anti-aliasing effects Christian C. Enz; Gabor C. Temes; “Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: Auto-Zeroing, Correlated Double Sampling and Chopper Stabilization 50

Offset Reduction Techniques | Summary  Trimming – reduces offset but not 1/f noise – no loss of bandwidth – doesn’t affect signal path

 Auto-zeroing – reduces 1/f noise, but sampling ⇒ noise aliasing – direct loss of bandwidth – can affect signal – potential for added glitch and aliasing

 Chopping – eliminates 1/f noise ⇒ best noise efficiency – indirect loss of bandwidth – can affect signal – potential for added glitch and aliasing

51

Back-up

52

Differential output amplifiers • Lots of reasons to use differential signal precessing – SNR, less parasitics, less inteference, etc.

• Differential output provide an extra degree of freedom in the circuit – Additional feedback is required to stabilize it

53

Common-mode feedback

54

Common-mode feedback examples

55

CM feedback examples (cont)

56...