DLD-F20-L01 - lab PDF

Title DLD-F20-L01 - lab
Author qaisur rehman
Course Digital logic design
Institution University of Engineering and Technology Lahore
Pages 14
File Size 829.1 KB
File Type PDF
Total Downloads 75
Total Views 153

Summary

lab...


Description

Faculty of Engineering EE/CE-233L: Digital Logic Design Lab

Course Instructor:

Dated:2/10/2020

Lab Engineer 1:

Semester:

Lab Engineer 2:

Session:

LAB 1

Name

Qais Ur Rehman

Verification of Basic Logic Gate Truth Tables by Use of NI Multisim Live

Roll. No.

Report Marks (10)

Viva Marks (5)

Total Marks (15)

Bsee19010

Checked on: ____________________________

Signature: ____________________________

EE/CE-233L: Digital Logic Design Lab

Verification of Basic Logic Gate Truth Tables by Use of NI Multisim Live 1.1. Introduction This lab exercise familiarizes students with NI Multisim Live and its various features. Construction of basic logic circuits and verification of their operation from the simulation are demonstrated in Multisim Live. Students verify the truth tables of the three basic logic gates of AND, OR and NOT.

1.2. Objectives This lab will enable students to achieve the following:    

Familiarize with the different features of the NI Multisim Live Construct a logic circuit that contains digital inputs and is able to display digital output on LEDs Familiarize themselves with the three basic Boolean operations and their respective logic gates, AND, OR and NOT Verify the operation of the logic gates and derive their truth tables

1.3. Conduct of Lab 1. 2. 3. 4.

The students have to perform this experiment using NI Multisim. The students are required to work individually. In case some aspect of the lab experiment is not understood, the students are advised to seek help from the lab engineer or the teaching assistant. At the end of the lab, every student is required to save the completed lab manual in PDF format and submit this single PDF file on Google Classroom at the submission link created for this lab.

1.4. Theory and Background 1.4.1. NI Multisim NI Multisim is a circuit design and simulation program, manufactured by National Instruments. It is used to construct schematic diagrams, simulate the behavior and test the output of electronic circuits. A paid, fully featured version of Multisim has about 55000 components, ranging from the basic ones such as resistors, capacitors, inductors, diodes, MOSFETs, BJTs, etc. to the more advanced ones, such as logic ICs, microcontrollers, microprocessors, RAMs, ROMs etc. and provides several measurement and analysis instruments and tools. Multisim, coupled with Ultiboard, can be used for PCB design. At the moment, Multisim is only available for Windows OS. 1.4.1.1. NI Multisim Live NI Multisim Live is the online version of Multisim that can be run in an internet browser on any OS platform. The free version of Multisim Live is a downgraded version of Multisim (desktop). It contains very few components and basic analysis and testing options. However, for the purpose of preliminary labs of this course, the features of the Multisim Live (free version) will suffice and we will perform the simulation part of our labs using this online application.

1.4.2. Logic gates In Boolean algebra, the three basic operations are AND, OR and NOT. In digital logic, these operations are implemented by logic gates, which are conveniently named after their operations, and hence are simply called AND, OR and NOT gates. The symbols and truth tables of each of these logic gates are shown in Figure 1.1.

LAB 1

Figure 1.1: AND, OR and NOT gate symbols and their truth tables

1.5. Lab Tasks 1.5.1. Task 1: First circuit construction and simulation using NI Multisim Live 1.5.1.1. Setting up Multisim Live In this task you will set up NI Multisim Live to build your first circuit. Follow the steps given below to complete this task: 1. 2.

Open a web browser and in the address bar, type this link and press enter: https://www.multisim.com/ The following webpage will open:

Figure 1.2: NI Multisim Live webpage

3.

On this page, click on the button that reads SIGN UP FOR FREE. The form of Figure 1.3 will appear. Sign up using your university email addresses and click on the CREATE ACCOUNT button at the bottom of the form.

EE/CE-233L: Digital Logic Design Lab

Figure 1.3: NI account sign-up form

4.

After your sign-up is complete, the following page should appear. Click on CREATE CIRCUIT button at the top right corner of the page.

Figure 1.4: Multisim Live profile page

LAB 1 5.

The following page will open:

Figure 1.5: Multisim Live GUI

6.

The white area with the gridlines in the center of this page is the Multisim Live workspace or, simply, the sheet, where you can draw your circuit schematics. On the left side, the vertical bar is the component toolbar. From this toolbar, you can select the components that you want to place in your workspace. The top bar contains the Start and Stop simulation buttons as labeled in Figure 1.5. You can also rename your circuit by clicking and typing in the field where, by default, Untitled Circuit is written.

1.5.1.2. Building our first logic circuit in Multisim Live In this part, we will build our first logic circuit to verify the operation of an AND gate. Please follow the steps given below: 1.

Firstly, we will need to place a DC voltage source and ground in our workspace. On the component toolbar, click on the second button and then, click on Ground as shown in Figure 1.6.

Figure 1.6: Schematic connectors: Ground

2.

The Ground component will be selected. Now, without clicking anywhere else, move your mouse pointer so that it is inside the workspace. Now left-click once. Ground will be placed in the workspace as shown in Figure 1.7.

EE/CE-233L: Digital Logic Design Lab

Figure 1.7: Ground placed on the workspace

3.

Now, select the third button on the component toolbar and click on DC Voltage as shown below:

Figure 1.8: Sources: DC Voltage

4. 5.

Place the DC Voltage in the workspace in the same way as Ground was placed in the previous steps. Now click on the 12 V value of DC Voltage. A small window will appear adjacent to the DC Voltage. Change the value to 5 in the field where, by default, 12 is written as shown in Figure 1.9.

Figure 1.9: Changing the DC Voltage value

6.

Next, we will need to place switches for digital input to our logic gate. As we will be using a 2-input AND gate, two switches will be required for the two inputs of the AND gate. The switches should be such that they are able to provide two voltage levels to the AND gate inputs. So we will use SPDT (Single-Pole, Dual-Throw) switch es. On the component toolbar, click on the seventh button and select SPDT as shown in the figure below:

Figure 1.10: Switches: SPDT

7.

Place two such switches in the workspace as shown below:

Figure 1.11: Two SPDT switches placed on workspace, notice that these have been given names S1 and S2 automatically

8.

You may want to flip the switches horizontally to make the two-terminal ends of both switches face the DC Voltage and Ground. To do so, click on the switch that you want to flip, and select the top-left option as shown below:

Figure 1.12: Flip/Mirror option at top-left; in the clockwise direction, the other options are for delete, duplicate and rotate

LAB 1 9.

After both switches have been flipped, now we will place an AND gate in the workspace. Click on the last button on the component toolbar and then click on AND as shown below:

Figure 1.13: Digtal components: AND gate

10. Select 2-Input AND from the next box that appears as shown in Figure 1.14 and place it in the workspace.

Figure 1.14: Several AND gate options, 2-input AND to be selected for this task

11. After having placed all the components needed to give digital input to the AND gate in our workspace, it is time to place some other components to view the output of the AND gate. The output will be observed using an LED connected in series with a resistor. So, on the component toolbar, click on the fourth button and select Resistor as shown below:

Figure 1.15: Passive components: Resistor

12. Place this resistor in the workspace to the right side of the AND gate. 13. Now, on the component toolbar, click on the sixth button and select LED as shown below:

Figure 1.16: Diodes: LED

14. Place this LED to the right side of the resistor. 15. Now all required components have been placed in the workspace and what is left is to connect them to each other using wires. The workspace at this point should look like as shown in Figure 1.17.

Figure 1.17: Workspace after all required components for this task have been placed

EE/CE-233L: Digital Logic Design Lab 16. To connect a terminal of one component to a terminal of another component, move the mouse to the first terminal until the mouse pointer changes its shape as shown below:

Figure 1.18: Mouse pointer shape changed; this implies that now a wire connected to this terminal will be created on left-click

17. Left-click once. A wire will be created whose one end will be connected to the terminal of the component on which you clicked and the other end will be hovering free with the mouse pointer, ready to be attached to the terminal of the other component. Move the mouse pointer to the terminal of the other component as shown in the figure below:

Figure 1.19: Wire connection to the other terminal

18. Left-click once while keeping the pointer over the other terminal. The wire connection between the two terminals will be created as shown in Figure 1.20.

Figure 1.20: Wire connected between two terminals successfully

19. Make all other connections in the same manner according to Figure 1.21.

Figure 1.21: Complete circuit to verify the operation of an AND gate

20. Now that the circuit is complete, we can start the simulation. Click on the Run button on the top toolbar as shown in the following figure:

Figure 1.22: Run simulation button

21. Simulation will start running and you will see the simulation time displayed adjacent to the Stop button on the toolbar.

LAB 1 22. Now change the position of the switches S1 and S2 by left-clicking on these and observe when LED1 lights up. As we have connected an AND gate, the LED should be lit up only when both S1 and S2 are at the 5 V position. 23. Toggle the switches for all possible combinations. Fill in the AND gate truth table below according to your observations: Table 1.1: AND gate truth table

S1

S2

LED1

0

0

0

1

0

0

0

1

0

1

1

1

24. After you have recorded your observations in the truth table, click on the Stop button to end the simulation. To save your circuit, click on the top-left matrix-like button which is the File navigation menu. A drop-down menu should appear as shown below:

Figure 1.23: File navigation menu in Multisim Live; it contains the save option along with other useful options

25. Click on Save. A new window will appear inside the Multisim Live webpage as shown below:

Figure 1.24: Save dialog box inside the Multisim Live webpage

26. In the free version you can only choose Public option in the Visibility tab. Choose an appropriate name for your circuit and click OK. You can also add Description and a tag if you want to.

EE/CE-233L: Digital Logic Design Lab 27. You can view all your circuits from the file navigation menu as shown in Figure 1.25.

Figure 1.25: Saved circuits in Multisim Live

28. Paste screenshot of your circuit in the space below:

1.5.2. Task 2: OR gate and its truth table 1.

Replace the AND gate with an OR gate in the circuit constructed in previous task. Take screenshot of your circuit and paste it in the textbox below:

LAB 1 2.

Run the simulation and note down the truth table of OR gate below: Table 1.2: OR gate truth table

S1

S2

LED1

0

0

0

1

0

1

0

1

1

1

1

1

1.5.3. Task 3: NOT gate and its truth table 1. 2. 3.

Construct a circuit that has a single input connected to a NOT gate. Display the output of the NOT gate on an LED. Take screenshot of your circuit and paste it in the textbox below:

4.

Run the simulation and fill in the truth table of NOT gate below: Table 1.3: NOT gate truth table

S1

LED1

0

1

1

0

1.5.4. Task 4: 3-input AND gate 1. 2.

Logic gates can have more than two inputs. Construct a circuit using a 3-input AND gate with three input switches. Take screenshot of your circuit and paste in the textbox below:

EE/CE-233L: Digital Logic Design Lab

3.

Run the simulation and make observations after toggling the input switches. Fill in the following truth table of a 3input AND gate according to your observations. Table 1.4: 3-input AND gate truth table

S1

S2

S3

LED1

1

1

1

1

0

0

0

0

0

0

1

0

0

1

1

0

1

0

0

0

1

0

1

0

1

1

0

0

0

1

0

0

1.5.5. Performance evaluation self-assessment 1.

Provide a brief review of your performance in this lab; specifically state two key theoretical concepts or design techniques that you have studied, verified by experiment or practiced in today’s lab session. Also explain any problem that you faced during the performance of this lab and how you overcame that problem. I have learned new concept about three input and gate and my previous concepts of logic gates are refreshed two important theoratical concept I learned is that we can also use switches to give high and low signals instead of digital signals and the other is that I learned how we can use 3 input and gate.

LAB 1

Assessment Rubric for Lab 1 Task No.

1

1

Performance Metric

Setting up Multisim Live

AND gate circuit construction

Max Marks

Good

Poor

1

Performs steps 1 – 6 of 1.5.1.1 without any error, such that NI account is created and Multisim Live is in a running position (1)

Performs steps 1 – 6 but makes minor errors in creation of account or has difficulty in starting Multisim Live (0.5)

Is unable to create an NI account and / or cannot start Multisim Live in a web browser (0)

4

Performs steps 1 – 19 of 1.5.1.2 without any error such that the circuit constructed in Multisim is identical to the one provided in manual and is ready for simulation (4)

Performs steps 1 – 19, but the resultant circuit has minor errors such as in the use of switches, or the output is not connected properly, or some component is missing or connected in an erroneous manner (3, 2)

Is unable to complete steps 1 – 19 and hence fails to complete the construction of the logic circuit (1, 0)

4

Shows simulation that works exactly as expected, i.e., the AND gate operation is verified for all combinations, and the truth table is filled in the correct order of combinations without any error (4)

Shows simulation that works but has slight deviations such as all combinations of AND gate cannot be verified, and/or the truth table entries are not in the correct order (3, 2)

Unable to show working simulation, fails to present output in a comprehensible manner (1, 0)

1

Replaces the AND gate with OR gate in the circuit of task 1 without any error (1)

1

Demonstration of working simulation and presentation of results

2

OR gate circuit construction

2

Demonstration of working simulation and presentation of results

4

3

NOT gate circuit construction

2

3

Demonstration of working simulation and presentation of results

4

3-input AND gate circuit construction

2

4

Excellent

Removes the AND gate and places the OR gate in the circuit but there are errors in connections (0.5) Shows simulation that Shows simulation that works exactly as works but has slight expected, i.e. the OR deviations such as all gate operation is verified combinations of OR gate for all combinations, and cannot be verified, output is noted down in and/or the output is not the manual without any correctly noted down in error (4) the manual (3, 2) Builds a circuit to verify Builds circuit containing the working of a NOT NOT gate but there are gate with all circuit minor errors in requirements, such as connections or some input switch, output LED circuit components are and voltage levels, missing (1) fulfilled (2) Shows simulation that Shows simulation that works exactly as works but has slight expected, i.e. the NOT deviations such as all gate operation is verified combinations of NOT for all combinations, and gate cannot be verified, output is noted down in or the output is not the manual without any correctly noted down in error (2) the manual (1) Builds a circuit to verify Builds circuit containing the operation of a 3-input the 3-input AND gate AND gate with all circuit but there are minor requirements, such as errors in connections input switches, output and/or some circuit LED and voltage levels, components are missing fulfilled (4) (3, 2)

Unable to replace the AND gate with the OR gate in the circuit of task 1 (0) Unable to show working simulation, fails to present results in a comprehensible manner (1, 0)

Unable to build a circuit to verify the working of a NOT gate (0)

Unable to show working simulation, fails to present results in a comprehensible manner (0)

Unable to build a circuit to verify the working of a 3-input AND gate (1, 0)

Obtained Marks

EE/CE-233L: Digital Logic Design Lab

4

Demonstration of working simulation and presentation of results

6

Performance evaluation selfassessment

2

Max Marks (Total):

30

Shows simulation that works exactly as expected, i.e. the 3-input AND gate operation is verified for all combinations, and output is noted down in the manual without any error (6) Mentions two theoretical concepts or design techniques covered in lab, also explains if any problem is faced or overcome (2) Obtained Marks (Total):

Lab Engineer:

Shows simulation that works but has slight deviations such as all combinations of 3-input AND gate cannot be verified, and/or the output is not correctly recorded in the...


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