MCQs Chapter 4 - Multiple Choice Questions for Combinational Logic PDF

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MCQs Digital Design Chapter The gates required to build a half adder are __________ a. EX-OR gate and NOR gate b. EX-OR gate and OR gate c. EX-OR gate and AND gate d. EX-NOR gate and AND gate The number of full and half adders are required to add 16-bit number is _________ a. 8 half adders, 8 full a...

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MCQs Digital Design Chapter #4 1. The gates required to build a half adder are __________ a. EX-OR gate and NOR gate b. EX-OR gate and OR gate c. EX-OR gate and AND gate d. EX-NOR gate and AND gate 2. The number of full and half adders are required to add 16-bit number is _________ a. 8 half adders, 8 full adders b. 1 half adders, 15 full adders c. 16 half adders, 0 full adders d. 4 half adders, 12 full adders 3. The carry propagation can be expressed as ________. a. Cp = AB b. Cp = A + B c. d.

4. Two 4-bit binary numbers (1011 and 1111) are applied to a 4-bit parallel adder. The carry input is 1. What are the values for the sum and carry output? a. 4 3 2 1 = 0111, Cout = 0 b. 4 3 2 1 = 1111, Cout = 1 c. 4 3 2 1 = 1011, Cout = 1 d. 4 3 2 1 = 1100, Cout = 1 5. A full-adder has a Cin = 0. What are the sum ( ) and the carry (Cout) when A = 1 and B = 1? a. b. c. d.

= 0, Cout = 0 = 0, Cout = 1 = 1, Cout = 0 = 1, Cout = 1

6. How many 4-bit parallel adders would be required to add two binary numbers each representing decimal numbers up through 30010? a. 1 b. 2 c. 3 d. 4

7. A certain BCD-to-decimal decoder has active-HIGH inputs and active-LOW outputs. Which output goes LOW when the inputs are 1001? a. 0 b. 3 c. 9 d. None. All outputs are HIGH

8. The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels? a. A > B = 1, A < B = 0, A < B = 1 b. A > B = 0, A < B = 1, A = B = 0 c. A > B = 1, A < B = 0, A = B = 0 A > B = 0, A < B = 1, A = B = 1

9. Which of the following combinations of logic gates can decode binary 1101? a. b. c. d.

One 4-input AND gate One 4-input AND gate, one OR gate One 4-input NAND gate, one inverter One 4-input AND gate, one inverter

10. How many inputs are required for a 1-of-10 BCD decoder? a. 1 b. 4 c. 8 d. 10 11. How many inputs will a decimal-to-BCD encoder have? a. 4 b. 8 c. 10 d. 16 12. How many 3-line-to-8-line decoders are required for a 1-of-32 decoder? a. 1 b. 2 c. 4 d. 8 13. How many outputs would two 8-line-to-3-line encoders, expanded to a 16-line-to-4-line encoder, have? a. b. c. d.

3 4 5 6

14. The following switching functions are to be implemented using a decoder: f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7) The minimum configuration of decoder will be _________ a. 2 to 4 line b. 3 to 8 line c. 4 to 16 line d. 5 to 32 line 15. For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the

input be LOW. What is the status of the Y output?

a. b. c. d.

LOW HIGH Don't Care Cannot be determined

16. For the device shown here, let all D inputs be LOW, both S inputs be HIGH, and the input be HIGH. What is the status of the Y output?

a. b. c. d.

LOW HIGH Don’t Care Cannot be determined

17. A priority encoder has ten active-LOW inputs and four active-LOW outputs. What would be the state of the four outputs if inputs 4 and 5 are LOW and all other inputs are HIGH?

a. b.

c. d. 18. How many data select lines are required for selecting eight inputs? a. 1 b. 2 c. 3 d. 4 19. How many 1-of-16 decoders are required for decoding a 7-bit binary number? a. b. c. d.

5 6 7 8

20. Which gate is best used as a basic comparator? a. NOR b. OR c. Exclusive-OR d. AND 21. The device shown here is most likely a ________.

a. b. c. d.

Comparator Multiplexer Demultiplexer parity generator

22. What distinguishes the look-ahead-carry adder? a. It is slower than the ripple-carry adder. b. It is easier to implement logically than a full adder. c. It is faster than a ripple-carry adder. d. It requires advance knowledge of the final answer.

23. How many possible outputs would a decoder have with a 6-bit binary input? a. b. c. d.

16 32 64 128

24. What is the status of the inputs S0, S1, and S2 of the eight-line multiplexer in order for the output Y to be a copy of input I5? a. S0 = 0, S1 = 1, S2 = 0 b. S0 = 0, S1 = 0, S2 = 1 c. S0 = 1, S1 = 1, S2 = 0 d. S0 = 1, S1 = 0, S2 = 1 25. How many inputs must a full-adder have? a. 2 b. 3 c. 4 d. 5 26. What is the correct output of the adder in the given figure, with the outputs in the order:

a. b. c. d.

10111 11101 01101 10011

27. How many inputs are required for a 1-of-16 decoder? a. 2 b. 4 c. 8 d. 16

28. 3 bits full adder contains ___________ a. 3 combinational inputs b. 4 combinational inputs c. 6 combinational inputs d. 8 combinational inputs 29. Decimal digit in BCD can be represented by ___________ a. 1 input line b. 2 input lines c. 3 input lines d. 4 input lines 30. If the number of n selected input lines is equal to 2^m then it requires _____ select lines a. 2 b. m c. n d. 2n 31. How many select lines would be required for an 8-line-to-1-line multiplexer? a. 2 b. 4 c. 8 d. 3 32. In the given 4-to-1 multiplexer, if c1 = 0 and c0 = 1 then the output M is ___________

a. b. c. d.

X0 X1 X2 X3

33. 4 to 1 MUX would have ___________ a. 2 inputs b. 3 inputs c. 4 inputs d. 5 inputs

34. The two input MUX would have ____________ a. 1 select line b. 2 select line c. 3 select line d. 4 select line 35. Without any additional circuitry an 8:1 MUX can be used to obtain ___________ a. Some but not all Boolean functions of 3 variables b. All function of 3 variables but none of 4 variables c. All functions of 3 variables and some but not all of 4 variables d. All functions of 4 variables 36. How many outputs will a decimal-to-BCD encoder have? a. 4 b. 8 c. 12 d. 16 37. How many OR gates are required for an octal-to-binary encoder? a. 3 b. 2 c. 8 d. 10 38. If two inputs are active on a priority encoder, which will be coded on the output? a. The higher value b. The lower value c. Neither of the inputs d. Both of the inputs 39. The binary adder circuit is designed to add ________ binary numbers at the same time. a. 2 b. 4 c. 6 d. 8 40. In a BCD-to-seven-segment converter, why must a code converter be utilized? a. to convert the 4-bit BCD into 7-bit code b. to convert the 4-bit BCD into 10-bit code c. to convert the 4-bit BCD into Gray code d. No conversion is necessary. 41. How many select lines would be required for an 8-line-to-1-line multiplexer?

a. b. c. d.

2 3 4 8

42. One way to make a four-bit adder perform subtraction is by: a. inverting the output. b. inverting the carry-in. c. inverting the B inputs. d. grounding the B inputs

43. The binary adder circuit is designed to add ________ binary numbers at the same time. a. 2 b. 4 c. 6 d. 8 44. The simplified expression of full adder carry is: a. C = xy + xz + yz b. C = xy + xz c. C = xy + yz d. C = x + y +z 45. When the mode of adder subtractor is 1 then it : a. Adds b. Subtracts c. Divides d. Multiplies...