Prep14-solution - solutions to the Prep 14 hw from Dr. Mason at MSU PDF

Title Prep14-solution - solutions to the Prep 14 hw from Dr. Mason at MSU
Author Anonymous User
Course Microprocessors & Digital Sys
Institution Michigan State University
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ECE 331 Spring 2019 Preparation Exercise 14 -SolutionsDue Mon April 22 at the beginning of class.Please refer to Module 10 course notes to answer the following questions. How many discrete output values does a 12-bit ADC have? How much voltage (in mV) does each bit represent if VRH = 1 and VRL = 0V?...


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ECE 331 Spring 2019

Preparation Exercise 14 -Solutions

Due Mon April 22 at the beginning of class. Please refer to Module 10 course notes to answer the following questions. 1. How many discrete output values does a 12-bit ADC have? How much voltage (in mV) does each bit represent if VRH = 1.8V and VRL = 0V? 212 = 4096. 1.8V / 4096 = 0.439 mV 2. Three common ADC architectures are Flash, Sigma-Delta, and Successive approximation register (SAR). Which of these three ADC architectures is: a) best for applications demanding very high resolution (high number of ADC bits) Sigma-Delta ADCs are slow but provide the highest resolution b) best for applications requiring a balance of resolution and speed SAR ADCs are best for moderate speed and moderate resolution applications c) best for applications that only need medium resolution but must have a very high sample rate Flash ADCs are the fastest 3. What ADC architecture is employed in the KL25Z ADC module? 16-bit SAR, successive approximation 4. How many conversion cycles would the KL25Z ADC need to achieve 10-bit resolution? Each conversion cycle provides 1 bit resolution, so it would need 10 cycles. 5. You have been asked to design a system that can record the analog output of a sensor using a microcontroller with an ADC. The sensor’s output has information in the frequency band of 100Hz to 100kHz. a) What ADC sampling rate should you use to meet the Nyquist criterion? The Nyquist criterion says we need to sample at least 2x the max frequency of signal information content. So, here that would be fs = 200kHz. This is, however, just the minimum frequency and you would generally want to sample even faster, up to 10x the information frequency, or 1MHz in this case –provided your ADC can be sampled that rapid. b) With respect to data sampling, what is aliasing? How can it be prevented? Aliasing is the creation of artifacts, erroneous data, due to the data sampling process. It can occur if the sampling rate is set too low so that the true frequency content is missed. Aliasing can also occur when data is oversampled at a frequency higher than data content, resulting in generation of high frequency artifacts that should be removed with a LPF. c) Assuming you wanted to develop a digital low pass filter to prevent aliasing, what cutoff frequency should you set for the filter? LPF cutoff is typically set to the max frequency of information content in the data, so 100KHz in this case. 6. Assuming that a microcontroller features a 10-bit SAR ADC with VRH = 3.3V, VRL = 0.1V, determine the following: a) What is the level of quantization or number of digital steps? number of steps = 2b = 210 = 1024

b) What is the resolution of this ADC in µV/step? resolution = (VRH – VRL) / 2b = (3.3 – 0.1) / 1024 = 3125 µV/step c) What hexadecimal digital value would be produced by this ADC for an input of 2.22V? Assume the ADC assigns the digital value to the lowest voltage within each step (effectively truncates any voltage beyond the largest full step). Vdigital = (Vanalog – VRL) / resolution = (2.22 – 0.1) / 3125µ = 678.4  678 = 0x2A6 Note that rounding errors can easily occur in ADC calculations. For example, if we had rounded the resolution to 3.1mV/step we would have calculated Vdigital = 683.9  0x2AC which is not the right value. Thus, with ADC calculations you should generally avoid any rounding and instead use full algebraic expressions like this: Vdigital = (Vanalog – VRL) / resolution = (Vanalog – VRL) * [2b /(VRH – VRL)] 7. You have been asked to design a microcontroller system that must interface to an analog signal. a) If the analog signal has a range from 0.1V to 2.5V and a voltage sensitivity of 2mV, what is the minimum number of ADC bits (8-bit, 10-bit, etc.) your chosen microcontroller must have? This problem essentially asks us to find the number of bits needed to achieve a resolution equal to or better than 2mV/step. resolution = (VRH – VRL) / 2b  2b = (VRH – VRL) / resolution = (2.4)/2m = 1200 thus, b = log2(1200), but most calculators won’t do base 2 logs so let’s solve this by trial and error. 8 bits  256, much too low 10 bits  1024, very close but would not allow 2mV resolution 11 bits  2048, which is more than 1200 and would allow more than 2mV resolution b) If you found a microcontroller you liked that had a 12b ADC, but it had fixed ADC references of VRH=5V and VRL=0V, would this controller still meet your analog sampling needs? This problem essentially asks us check if this ADC provides more than the required 5mV/step resolution. resolution = (VRH – VRL) / 2b = (5 – 0) / 4096 = 1.2mV/step which is higher resolution than 2mV/step. Thus YES you could use this controller. 8. Use the Bin-Hex Bit Values Table below to answer the following questions. Note, this table will be on the Final Exam and can be helpful to answer a variety of types of questions, so it is valuable to practice using it prior to the exam. a. To sample and analog value that needs 30,000 binary steps of resolution, what ‘size’ ADC would be needed (how many bits)? The table shows that 15 bits would provide 32k steps while 14 bits only provide 16k steps. Thus we would need at least 15-bit ADC to provide 30,000 steps. b. To set the 17rd bit of a 32-bit register, what hexadecimal value would you use as a mask? Assuming the LSB is the 0th bit (which is our convention), then the 17th bit would be masked by the hex value 0x2.0000, based on the table. c. How many hexadecimal digits are needed to represent a register with 20 bits? This one can be tricky so follow closely! A 20-bit register would hold bits 19 – 0. So the largest value would be 0xF.FFFF (not 220 which is 0x10.0000). So the answer is 5 digits. The

table shows that n=19 uses 5 hex digits. n=20 would actually refer to the 21st bit of a register. d. What is the largest decimal value that can be represented with 6 hexadecimal digits? Looking at the table we see that the largest 6-digit hex values occurs at n=23; for n=24, we need 7 hex digits. Thus, the largest decimal value in 6 hex digits would be 224 – 1. We can get 224 from the table  16,777,216 - 1 = 16,777,215. 6 hex digits can represent 16M different values, but the largest value is 16M – 1. In other words, 0xFF.FFFF = 16,777,215.

Bin-Hex Bit Values Table n 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

2n 1 2 4 8 16 32 64 128 256 512 1,024 2,048 4,096 8,192 16,384 32,768

Bin 1 10 100 1000 1.0000 10.0000 100.0000 1000.0000 1.0000.0000 10.0000.0000 100.0000.0000 1000.0000.0000

Hex 0x1 0x2 0x4 0x8 0x10 0x20 0x40 0x80 0x100 0x200 0x400 0x800 0x1000 0x2000 0x4000 0x8000

Shorthand K=1024 M=1024K G=1024M

1K 2K 4K 8K 16K 32K

n 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

2n 65,536 131,072 262,144 524,288 1,048,576 2,097,152 4,194,304 8,388,608 16,777,216 33,554,432 67,108,864 134,217,728 268,435,456 536,870,912 1,073,741,824 2,147,483,648

Hex 0x1.0000 0x2.0000 0x4.0000 0x8.0000 0x10.0000 0x20.0000 0x40.0000 0x80.0000 0x100.0000 0x200.0000 0x400.0000 0x800.0000 0x1000.0000 0x2000.0000 0x4000.0000 0x8000.0000

Shorthand 64K 128K 256K 512K 1M 2M 4M 8M 16M 32M 64M 128M 256M 512M 1G 2G...


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