Unit 3 - Assembly Language Programming: Instruction formats addressing modes Intel PDF

Title Unit 3 - Assembly Language Programming: Instruction formats addressing modes Intel
Author POLI POLI
Course Computer Organisation and Assembly Language Programming
Institution Pondicherry University
Pages 5
File Size 156 KB
File Type PDF
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Summary

Assembly Language Programming: Instruction formats

addressing modes

Intel
8086/88 instruction mnemonics

timing data transfer arithmetic and machine control instructions - Introduction to Macro Assembler...


Description

UNIT III ASSEMBLY LANGUAGE PROGRAMMING Instruction formats: Layout of the bits of an instruction in terms of constituent elements, including – OpCode – (implicit or explicit) operand(s) – (implicit or explicit) mechanism indicating addressing mode used for each operand Usually more than one instruction format in an instruction set. Key design issues: – Number of addresses (L13) – Instruction length – Allocation of bits Instruction Length Affected by and affects: Memory size, Memory organization, Bus structure (bus width), CPU complexity, and CPU speed • Trade off between powerful instruction repertoire and saving space • More opcodes, more operands, more addressing modes, greater address range  shorter program  longer instruction length  slower instruction fetch. • Should be a multiple of the character length (8-bit) and fixed-point number length (a word length) Allocation of Bits Number of opcodes •

• •

Determined by length of OpCode field (fixed) Example: N=M+K bits instruction M-bit OpCode, K-bit address  2M operations; 2K addr.

space (M-1)-bit OpCode, (K+1)-bit address  2M-1 operations; 2K+1 addr. space (M+1)-bit OpCode, (K-1)-bit address  2M+1 operations; 2K-1 addr. space The length of OpCode can be variable  Extended OpCode • easy to provide a large repertoire of opcodes, with different lengths • more flexible addressing an increase in the complexity of the CPU. Factors determining the use of addressing bits •

Number of addressing modes

implicitly indicated by opcode or explicitly indicated by mode bits Number of operands • typically 2, each operand address requires its own mode indicator Number of registers • 8 ~ 32 user-visible registers are desirable  (3-5) bits Address range • determined by number of address bits Address granularity • byte-addressing, word-addressing •

• • • •

Addressing modes and addressing formats: • Immediate • Direct • Indirect • Register • Register indirect • Displacement (Indexed) • Stack Immediate Addressing: • Operand is part of instruction: Operand = A Example: ADD 5 – Add 5 (operand) to content of the accumulator • Pros & cons – No memory reference is required to fetch data – Fast Indirect Addressing: Pros & cons – Larger address space • 2N where N = a word length > K = length of address field • May be multilevel, cascaded – e.g. EA = (((A))) – An indirection flag bit indicates if EA is contained – Multiple memory accesses to find operand – Hence slower Register Addressing: Operand is held in a register named in the address filed: EA=R •

Pros & cons: Limited number of registers  a small address field needed (3-5 bits)  Shorter instructions  Faster operand fetch  No memory access  Fast instruction execution Very limited address space Register Indirect Addressing: Operand is in memory cell pointed by contents of register R: EA = (R) Pros & cons  Large address space 2N  One less memory access than indirect addressing

Stack Addressing: Implicit register indirect addressing: – Stack pointer (SP): contains address of the top of the stack (LIFO, Appendix 10A) – EA = top of stack

Operands are (implicitly) on top of stack PUSH X: (SP) -1  SP, (X)  (SP) POP X: ((SP))  X, (SP)+1  SP ADD: • Pop top two items from stack • Add Place result of addition on top of stack – – – –

Introduction to Macro assembler: Typically a modern assembler creates object code by translating assembly instruction mnemonics into opcodes, and by resolving symbolic names for memory locations and other entities.The use of symbolic references is a key feature of assemblers, saving tedious calculations and manual address updates after program modifications. Most assemblers also include macro facilities for performing textual substitution — e.g., to generate common short sequences of instructions to run inline, instead of in a subroutine. Assemblers are generally simpler to write than compilers for high-level languages, and have been available since the 1950s. Modern assemblers, especially for RISC based architectures, such as MIPS, Sun SPARC and HP PA-RISC, optimize instruction scheduling to exploit the CPU pipeline efficiently.  More sophisticated high-level assemblers provide language abstractions such as:  Advanced control structures  High-level procedure/function declarations and invocations  High-level abstract data types, including structures/records, unions, classes, and sets  Sophisticated macro processing  Object-Oriented features as encapsulation, polymorphism, inheritance, interfaces Note that, in normal professional usage, the term assembler is often used ambiguously: It is frequently used to refer to an assembly language itself, rather than to the assembler utility. Thus: "CP/CMS was written in S/360 assembler" as opposed to "ASM-H was a widely-used S/370 assembler."

Data Transfer: Data transmission is the conveyance of any kind of information from one space to another. Historically this could be done by courier, a chain of bonfires or semaphores, and later by Morse code over copper wires. In recent computer terms, it means sending a stream of bits or bytes from one location to another using any number of technologies, such as copper wire, optical fiber,

laser, radio, or infra-red light. Practical examples include moving data from one data storage device to another such as accessing a website, which involves data transfer from web servers to a user's browser. A related concept to data transmission is the data transmission protocol used to make the data transfer legible. Current protocols favor packet based communication. Types of data transmission: Serial transmission bits are sent over a single wire individually. Whilst only one bit is sent at a time, high transfer rates are possible. This can be used over longer distances as a check digit or Parity bit can be sent along it easily. Parallel transmission multiple wires are used and transmit multiple bits simultaneously and is much faster than Serial transmission as one byte can be sent rather than one bit. This method is used internally within the computer, for example the internal buses, and sometimes externally for such things as printers, how ever the major issue with this is "skewing" because the wires in parallel data transmission have slightly different properties (not intentionally) so some bits may arrive before others, which means that the original "meaning" of the message is lost and thus leads to corruption a parity bit can help to reduce this. How ever parallel data transmission is therefore unsuitable for long distances (as already mentioned) because skewing is far more likely. Asynchronous and synchronous data transmission: Asynchronous transmission uses start and stop bits to signify the beginning bit ASCII character would actually be transmitted using 10 bits e.g.: A "0100 0001" would become "1 0100 0001 0". The extra one (or zero depending on parity bit) at the start and end of the transmission tells the receiver first that a character is coming and secondly that the character has ended. This method of transmission is used when data is sent intermittently as opposed to in a solid stream. In the previous example the start and stop bits are in bold. The start and stop bits must be of opposite polarity. This allows the receiver to recognize when the second packet of information is being sent. Synchronous transmission uses no start and stop bits but instead synchronizes transmission speeds at both the receiving and sending end of the transmission using clock signals built into each component. A continual stream of data is then sent between the two nodes. Due to there being no start and stop bits the data transfer rate is quicker although more errors will occur, as the clocks will eventually get out of sync, and the receiving device would have the wrong time that had been agreed in protocol (computing) for sending/receiving data, so some bytes could become corrupted (by losing bits). Ways to get around this problem include re-synchronization of the clocks and use of check digits to ensure the byte is correctly interpreted and received....


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