2bit Synchronous Counter PDF

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Summary

Two-bit Synchronous Counter. A Two-bit synchronous counter designed by using two reversible JK Flip flop and two Feynman gate. The clock input is given to Feynman gate; Feynman gate output is connected to another Feynman gate as input and also joined to reversible JK flipflop as clock input....

Description

Desi gnof2bi tSynchr onousCount erusi ngJK fli pflops ( Di gi t alTi merAppl i c at i ons)

Ai m: Todesi gn,si mul at e,and ver i f yt hesynchr onouscount erusedi n Di gi t alt i me r appl i cat i ons. Sof t war er equi r ed: LTSpi cesof t war eTheor y: A count eri sasequent i all ogi cci r c ui tt hatgoest hr ough apr e scr i bedsequence ofs t at e supont heappl i cat i onofi nputpul ses.Thepr escr i bedse quencecanbe abi nar ysequenceoranyot hers equence.Acount ert hatgoest hr ough2N ( Ni s t henumberoffli pflopsi nt heser i es)s t at e si sc al l ed a bi nar ycount er . The modul us ofa c ount e ri st henumberofdi ffe r e nts t at e si ti s al l owed t o hav e . Count e rmodul usi snor mal l y2N unl essc ont r ol l ed byaf eedbac kc i r c ui twhi c h l i mi t st henumberofposs i bl est at es( an e xampl ebei ng t hedeci malcount er ) . Count e r s ar ev er y wi de l y used i n al mos t al lcomput e r s and ot he r di gi t al e l ect r oni cs ys t ems . The r ear et womaj orcat egor i esofcount er s:as ync hr onous c ount e r sandsynchr onouscount er s. Synchr onousCount er : I nt hi sc ount e r ,al lt hefli pflopsr e cei v et heext e r nalc l oc kpul sesi mul t aneousl y . Ex: -Ri ngcount er& Johnsoncount er Thegat espr opagat i onde l ayatr e se tt i mewi l lnotbepr esentorwemay

Sayt hati twi l lnotocc ur . Cl assi ficat i onofs ynchr onouscount er : Dependi ngont hewayi nwhi c hc ount i ngpr oc esses,t hesync hr onous c ount e ri sc l as si fiedi s: -1) Upc ount e r . 2)Downcount er . UpCount er : Theupc ount e rc ount sbi nar yf or m 0t o7 i . e . ( 000 t o111) . I tc ount sf r om s mal l t o l ar genumbe r .I t ‘ sO/Pgoe soni ncr e asi ngast he yr e cei v ec l oc kpul seDown Count er : Thi sdowncount erc ount sbi nar yf r om 70i . e. ( 111000) . I tcount sf r om l ar get o smal lnumber .I t ‘ sO/Pgoe soni ncr eas i ngast he yr e cei v ec l oc kpul se Exci t at i on Tabl e: -Thet abul arr epr e sent at i onoft heoper at i on ofJK fli pflop ( i . e:Oper at i onalChar act er i st i c)

For M = 0, it acts as an Up counter and for M =1 as a Down counter. Logic Diagram for Synchronous Counter:

Up Counter:

Counter state

Q0

Q1

0

0

0

1

0

1

2

1

0

3

1

1

Counter state

Q0

Q1

3

1

1

2

1

0

1

0

1

0

0

0

Down Counter:

Pr ocedur eus i ngLTs pi ce 1) OpenLTspi ce .Got oFi l e–New Sc hemat i c.

2) Ont heFi l eMenu,c l i ckonEdi t–Component .

3) Pl ac eJKfli pflop,ORgat e,AND gat e,andNOTgat eont osc he mat i c .

4) Pl ac et hr ee v ol t age s our c es f ort he t hr ee i nput s( M,CLK,I /P)on t he sc hemat i c .

5) Makenec essar yconnec t i onsaspert heci r cui tdi agr am.Usel abelne tt o nameal lt hesour c esandout put . Upc ount er :

Downcount er :

6) Pr ovi dei nputt ot hesour c esM,CLK and I /P.Ri ghtc l i c k on t hev ol t age sour ces.Se l ectPULSE( V1V2Tde l ayTr i seTf al lTonPe r i odN cycl es) . #ForUPcount e r ,Se tt hev al uef orM as5.

•

Se tt heval uesas( 0,5,0,1ns,1ns ,0. 5ms ,1ms)f orCLK.

•

Se tt heval uesas5f orI /P.

#ForDowncount er ,Sett heval uef orM as0.

•

Se tt heval uesas( 0,5,0,1ns,1ns ,0. 5ms ,1ms)f orCLK.

•

Se tt heval uesas5f orI /P.

7) Got oEdi t–SPI CE anal ysi s .Se tt hes t opt i met o4ms

8) Runt hesi mul at i on( r unsymbolonme nubar ) . 9) Tovi ew t her e sul t s,r i ghtc l i ck–AddPl otPane( add3pl otpane st ovi ew t heCLK,QA,QB) .

Foreac hpane,r i ghtc l i c k–AddTr ac e–Se l ectV( ) . ( Nodesc or r e spondt oCLK, QA,QB)

12)Obser v et hewav e f or msandv er i f yt het r ut ht abl e.

ForUpc ount e r :

ForDownc ount er :

OBSERVATIONS: SCHEMATIC DIAGRAM UP COUNTER

DOWN COUNTER

WAVEFORMS: UP COUNTER

DOWN COUNTER

Resul t sandI nf er ences: Thus ,asynchr onousupanddownc ount e rci r c ui ti si mpl e ment edusi ngJK fli pflops. Pr act i calAppl i cat i ons: Di gi t alt i mer ,LED i ndi cat orCont r olf ort r afficsi gnalpur pos es

Cour seOut come: CO3. Design sequential Logic Circuits St udentLear ni ngOut comes( SLO) : SLO5. Having design thinking capability

Vi vaQuest i onsandAnswer s: [1] Whatar et headvant agesofsynchr onouscount er soveras ynchr onous count er s ? Pr opagat i onde l ayt i mei sr educed Canoper at eatamuchhi gherf r equencyt hant heasynchr onouscount er s. [2] Ri ngcount eri sanexampl eofsynchr onouscount er sorasynchr onouscount er ? Synchr onouscount er .Si nc eal lt hefli pflopsar ec l ockedsi mul t aneousl y . [3] Twi st edRi ng( Johnson’ s)count eri sanexampl eofsynchr onouscount er sor asynchr onouscount er ? Synchr onouscount er .Si nc eal lt hefli pflopsar ec l ockedsi mul t aneousl y . [4] Whati st hedi ffer encebet weenr i ngcount erandt wi st edr i ngcount er ? I nr i ngcount erpul sest obecount ed ar eappl i ed t oacount er,i tgoesf r om s t at et o st at eandt heout putoft hefli pflopsi nt hecount eri sdecodedt or eadt hecount .Her e t heuncompl i ment aryout put( Q)ofl astfli pflopi sf edbackasani nputt ofir stfli pflop. Ri ngcount er sar er ef er r edasMOD_N count er s. Buti n Twi st ed r i ngcount ert hecompl i ment aryout put( Q bar )ofl astfli p flop i sf ed back as an i nputt o fir stfli p flop.Twi st ed Ri ng count er s ar er ef er r ed as MOD_2N count er s. [5] Whatar et heappl i cat i onsofr i ngcount er s ?

Ri ng c ount er out put s ar e sequent i alnonover l appi ng pul ses whi ch ar e use f ulf or cont r olst at ecount er s, Usedi nst eppermot or ,whi chr equi r espul sest or ot at ei tf r om oneposi t i ont ot henext . [6] Whatar et heappl i cat i onsofr i ngcount ert wi st edr i ngcount er s ? Usedf orcont r olst at ecount er s. Usedf orgener at i onofmul t i phasecl ock. [7] Li stt heSynchr onousCount erI Cs. I C 74160:DecadeUpCount er I C 74161:4bi tbi naryUpCount er I C 74162:DecadeUpCount er I C 74163:4bi tbi naryUpCount er I C 74168:DecadeUp/DownCount er I C 74169:4bi tBi naryUp/DownCount er I C 74190:DecadeUp/DownCount er I C 74191:4bi tBi naryUp/DownCount er I C 74192:DecadeUp/DownCount er I C 74193:4bi tBi naryUp/DownCount er...