Title | 3 - Digital Logic Inverters |
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Author | Sourav Sourav |
Course | Digital Electronics |
Institution | Indian Institute of Technology (Indian School of Mines), Dhanbad |
Pages | 1 |
File Size | 64.3 KB |
File Type | |
Total Downloads | 10 |
Total Views | 182 |
Digital Logic Inverters...
1064 Chapter 13 CMOS Digital Logic Circuits operation, also called the transition region. It follows that VIL is an important parameter of the inverter VTC: It is the maximum value that v I can have while being interpreted by the inverter as representing a logic 0. Similarly, we observe that the output low level, denoted VOL, does not depend on the exact value of v I as long as v I does not fall below VIH. Thus VIH is an important parameter of the inverter VTC: It is the minimum value that v I can have while being interpreted by the inverter as representing a logic 1.
13.1.3 Noise Margins The insensitivity of the inverter output to the exact value of v I within allowed regions is a great advantage that digital circuits have over analog circuits. To quantify this insensitivity property, consider the situation that occurs often in a digital system where an inverter (or a logic gate based on the inverter circuit) is driving another similar inverter, as shown in Fig. 13.4 Here we assume that a noise or interference signal v N is somehow coupled to the interconnection between the output of inverter G 1 and the input of inverter G 2 with the result that the input of G 2 becomes v I2 = v O1 + v N
(13.1)
where the noise voltage v N can be either positive or negative. Now consider the case v O1 = V OL ; that is, inverter G 2 is driven by a logic-0 signal. Reference to Fig. 13.3 indicates that in this case G 2 will continue to function properly as long as its input v I2 does not exceed VIL . Equation (13.1) then indicates that v N can be as high as VIL–VOL whileG 2 continues to function properly. Thus, we can say that inverter G 2 has a noise margin for low input, NM L , of NM L = V IL – V OL
(13.2)
Similarly, if v O1 = VOH , the driven inverter G 2 will continue to see a high input as long as v I2 does not fall below V IH . Thus, in the high-input state, inverter G 2 can tolerate a negative v N of magnitude as high as VOH – V I H . We can thus state that G 2 has a high-input noise margin, NM H , of NM H = VOH – V IH
(13.3)
In summary, four parameters, VOH, VOL, VIH, and VIL, define the VTC of an inverter and determine its noise margins, which in turn measure the ability of the inverter to tolerate. v O1 G1
⌺
v I2 G2
vN Figure 13.4 Noise voltage v N is coupled to the interconnection between the output of inverter G1 and the input of inverter G2....