Com1006 - Exam PDF

Preview

Summary

Exam...

Description

COM1006

Data Provided: NONE

DEPARTMENT OF COMPUTER SCIENCE DEVICES AND NETWORKS

Spring Semester 2019-2020 2 hours

Answer ALL QUESTIONS All questions carry equal weight. Figures in square brackets indicate the percentage of available marks allocated to each part of a question.

COM1006

1

TURN OVER

COM1006

1. a)

Consider a logic gate that has both inputs to the logic element, and inputs that control the behaviour of the logic element:

This gate takes A and B as inputs and produces the output Q from the inputs, using the logic gate behaviour defined by the Op inputs as defined in the table above.

b)

(i)

Write out the complete Truth Table for this gate, for all input values of A, B, Op1, and Op2, and their resultant output Q [20%]

(ii)

Using a Karnaugh Map, derive a boolean logic expression for this device.

[20%]

Consider a fictional processor that only has two registers: a data register D, and an address register A. This processor then has 10 instructions, defined as follows:

(i)

Explain in English the behaviour of the following code fragment:

[10%]

LOA 40 LOD 10 PUT

COM1006

2

CONTINUED

COM1006 (ii)

After the following instructions, describe the value in register D.

[20%]

LOA 40 LOD 42 ADI SWAP LOI (iii)

COM1006

Write a program for this processor that sums the values held in the 10 memory addresses starting at 42, and ends with the result in register D. You can use memory addresses 40 and 41 for temporary storage. Assume you can use labels in your code as jump destinations. [30%]

3

TURN OVER

COM1006

2. a)

b)

(i)

The performance of a network is governed by its latency and bandwidth. Explain each of these terms carefully. State the units in which they are measured. [10%]

(ii)

State the formula that connects latency and bandwidth, and explain the terms in this formula. [10%]

(iii)

How does this formula change when the latency is defined as first bit sent to first bit received and first bit sent to last bit received? [10%]

A 200 Mbps link is set up between the earth and moon. The distance between the earth and moon is approximately 395, 000 km, and the speed of light is 3 × 108 m/s. (i)

Calculate the round trip time (RTT) of the link.

[5%]

(ii)

Calculate the product delay × bandwidth. What is the significance of this result? [10%]

(iii)

What is the latency, defined as the first bit sent to last bit received, to send a 50 MB image from the moon to the earth? [10%]

c)

Explain the exponential backoff algorithm for checking if two frames collide. Include in your answer the circumstances under which a jamming sequence is sent, and the reason for its transmission. [15%]

d)

A and B are two hosts that are attempting to transmit on an Ethernet. Each host has an unlimited supply of frames, labelled A1 , A2 , . . . , and B1 , B2 , . . . Describe the exponential backoff algorithm when B wins the first race, A wins the second, third and fourth races, and B wins the fifth race. Assume T = 51.2 µs. [15%]

e)

Hosts A and B are connected to a switch via a 10 Mbps link, as shown below. The propagation delay in each link is 30µs and S is a store–and–forward device that begins transmitting a packet 40µs after it has finished receiving it. Calculate the total time required to transmit 20000 bits from A to B if the message is sent as a single packet. [15%]

A

S

END OF QUESTION PAPER

COM1006

4

B...