Constructing A Binary Calculator PDF

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How to construct a calculator...

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Constructing A Binary Calculator Digital logic design final project Student #1: 2017368 - Omer Shaikh Student #2: 2017402 - Saif Ul Islam Siddiqui Instructor: Mr. Adil Muhummad Lab timing: Tuesday Mornings

Constructing a Binary Calculator using Only Logic Gates 1. Introduction

2. Abstract

A calculator is any machine that

In summation, the machine consists of

performs arithmetic operations using

four main modules: An adder circuit, a

pre-programmed logic. This project

subtractor circuit, a multiplier circuit, and

involves assembling one such machine,

a divider circuit. However, there are

although simplistic in comparison to

add-ons to these modules which serve

many modern calculators. By limiting

to improve the functionality of these

this project to logic gates, the full

respective circuits. These involve a 5 bit

knowledge of the digital logic design

binary to BCD converter as well as a

course has been harnessed in order to

circuit which takes the two’s compliment

assemble this project. Techniques that

of any 5 bit code. The prior is intended

have been taught in the course, such as

so that the output of the subtracter,

simplification through karnaugh maps,

adder, and divider which both output in

reducing expressions through

5 bits or less, can be converted into

demorgan's law, and implementing

BCD for output on a seven segment

boolean expressions have all been used

display screen. The latter is designed so

in tandem so that this project may

that the subtracter’s output, which is in

become a possibility. Had more

two’s complement form, can be

advanced means been applied, such as

converted back into binary for the

using programmable logic through an

convenience of the user.

arduino for example, this project would become a far easier task and no

3. Objective

knowledge of the digital logic design course would be required. As such, this

Initially, the objective of this project as

project is based solely on design and

assigned by the instructor, was to only

implementation through logic gates.

assemble circuits which could take up to

1

8 bits of input in every circuit. However,

adder circuits must be used in tandem in

due to the complexity of such a machine

order to generate a valid output. The

as well as the restrictions discussed in

logic diagram for the adder has been

the introduction, it was later decided that

included in the report.

the adder and subtractor would be limited to 4 bit inputs, while the multiplier

2. The 4 bit modified

and divider would receive 2 bit inputs.

subtractor:

Nevertheless, due to a unique design that was implemented in this project, it

The subtractor is built on a borrow in /

was possible to construct a multiplier

borrow out logic and this loop repeats

that would accept 3 bit inputs. In regards

on for all the four bits. The difference (

to this, as well as the additional efforts

equivalent to sum in adder) is the same

that were made in developing and

as for adder circuit by applying XOR to

implementing the decoder as well as the

the LSB’s and then to the carry.3

two’s complement circuit, the objective

However the carry/borrow is generated

of this project has been more than

by inverting one of the inputs and then

accomplished.

sending it to the AND gate. The circuit gives correct binary answer when a

1. The 4 bit adder:

large number is subtracted from a smaller one, nevertheless a 2’s

The design of the 4 bit adder involves

complimented answer is obtained in the

multiple full adder modules attached in

case if a negative output is generated.

series. 1 The full adder logic circuit uses

To fix this, the designers performed

two AND gates as well as two XOR

another 2’s complement on the answer

gates in order to generate one sum and

to ensure that output is achieved in

one carry. Multiple sums and carries

binary from even if the initial output is

must be generated in order to add 2

negative.4

digits together.2 Hence, multiple full 3 1

See page 6 for logic diagram of a full adder 2 See page 6 for logic circuit of a 4 bit adder

See page 7 for logic diagram of full subtractor See page 7 for logic circuit 4 bit modified subtractor 4

2

3. The 3 bit multiplier:

ones, the carry will be taken to be a 1. However, in the case of all four digits

The unique design of the 3 bit multiplier

being 1, the carry would need to be 10,

was discovered by applying arithmetic

or decimal 2. It is not possible to detect

multiplication between two seperate 3

a carry which consists of more than one

bit digits. The corresponding products

digit, because a logic gate may only

were implemented using AND gates, the

output one digit. As such, in the special

corresponding sums were implemented

case of every input being a 1, which

using XOR gates, and carries were

represents the max output case of

generated using AND gates. In essence,

7x7=49, a special solution has been

the design made use of full adder

implemented through detecting this

circuits with a twist in order to implement

special case scenario and triggering a

the boolean expressions derived for

specific set of LEDS to turn on or off.

each output bit. Because this is a 3 bit

This has been done through using AND

multiplier, it outputs in six bits, meaning

gates to detect when all inputs are 1,

that the 5 bit decoder will not be able to

and using this result to turn on certain

work should the six bit be functional.

LEDS. Also, through performing a XOR

While implementing the arithmetic

operation upon this result and the LED

multiplication, there is an instance

inputs, an LED may be turned off.5

where three digits need to be added 4. The 2 bit divider:

together along with one carry. Finding the sum of 4 digits is simple because it may only be a 1 or a 0, and a series of

Logic for 2 bit divider was quite simple,

xor gates will be able to produce the

as we took 2 inputs and drew a truth

sum. In order to produce the carry for

table for the outputs and later got the

the operation, a series of AND gates

simplified through plotting Karnaugh

can be used to form a basic comparator

maps for the outputs which was easily

in order to detect the amount of 1’s

implemented without much issues.6

being inputted. If there are one or more 5 6

See page 8 for logic circuit of multiplier See page 8 for logic circuit of divider

3

5. The 5 bit binary to BCD decoder:

We needed this circuit to be able display our 5 bit binary output on a seven segment display so that our user interface has some sort of decimal number to become user friendly. This could have been achieved efficiently by a 74185 Binary to BCD converter however this IC did not seemed to work flawlessly therefore we designed our own 5 bit binary to BCD convertor which turned out to be a massive and complex circuit. ( which can be viewed on the next page ). The inputs of this circuit will be the answers of each circuit separately that is the adder, subtractor, multiplier and the divider. Once completed the outputs of this binary to BCD we connected to 7447 IC’s which are used to display answer on a seven segment display.7

7

See page 5 for logic circuit of decoder

4

The 5 bit binary to BCD decoder:

5

Adder Logic Circuit:

6

Modified subtractor logic circuit:

7

Multiplier Logic Circuit:

Divider Logic Circuit:

8

Conclusion:

In summation, the calculator was

References/Works Cited:

● (n.d.). Retrieved from

implemented successfully and is 100% functional with respect to the objectives

http://www.johnloomis.org/ece314/n

aforementioned. With more time, this

otes/devices/binary_to_BCD/bin_to_

project could be expanded so that

bcd.html

binary to BCD decoder accept a larger amount of binary inputs. However, due

● Administrator. (2017, December 24).

to the tedious amount of logic gates

Binary Multiplication Methods.

required for even a 5 bit input

Retrieved from

conversion, this would prove an arduous

https://www.electronicshub.org/binar

task. In addition to this, the multiplier and divider circuits could be expanded to allow inputs of up to 4 bits. This was a possibility that had been discussed

y-multiplication/ ● Binary Subtractor used for Binary Subtraction. (2018, September 20).

within the span of this project. However, this would require a full adder integrated

Retrieved from

circuit(74LS83A), which was not

https://www.electronics-tutorials.ws/

available at the time. Also, using this

combination/binary-subtractor.html

integrated circuit would mean that the limitation of only using logic gates to compute outputs would be violated.

● Floyd, T. L. (2015). Digital fundamentals . Harlow: Pearson Education.

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