Icl8038 datasheet PDF

Preview

Summary

datasheet generador de ondas...

Description

ICL8038

S E M I C O N D U C T O R

Precision Waveform Generator/ Voltage Controlled Oscillator

November 1996

Features

Description

• Low Frequency Drift with Temperature . . . 250ppm/oC

The ICL8038 waveform generator is a monolithic integrated circuit capable of producing high accuracy sine, square, triangular, sawtooth and pulse waveforms with a minimum of external components. The frequency (or repetition rate) can be selected externally from 0.001Hz to more than 300kHz using either resistors or capacitors, and frequency modulation and sweeping can be accomplished with an external voltage. The ICL8038 is fabricated with advanced monolithic technology, using Schottky barrier diodes and thin film resistors, and the output is stable over a wide range of temperature and supply variations. These devices may be interfaced with phase locked loop circuitry to reduce temperature drift to less than 250ppm/oC.

• Low Distortion . . . . . . . . . . . . . 1% (Sine Wave Output) • High Linearity . . . . . . . . . 0.1% (Triangle Wave Output) • Wide Frequency Range . . . . . . . . . . 0.001Hz to 300kHz • Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . 2% to 98% • High Level Outputs . . . . . . . . . . . . . . . . . . . .TTL to 28V • Simultaneous Sine, Square, and Triangle Wave Outputs • Easy to Use - Just a Handful of External Components Required

Ordering Information STABILITY

TEMP. RANGE (oC)

ICL8038CCPD

250ppm/oC (Typ)

0 to 70

ICL8038CCJD

250ppm/oC (Typ)

0 to 70

14 Ld CERDIP

F14.3

ICL8038BCJD

180ppm/oC (Typ)

0 to 70

14 Ld CERDIP

F14.3

ICL8038ACJD

120ppm/oC (Typ)

0 to 70

14 Ld CERDIP

F14.3

ICL8038BMJD (Note)

350ppm/oC (Max) 250ppm/oC (Max)

-55 to 125

14 Ld CERDIP

F14.3

-55 to 125

14 Ld CERDIP

F14.3

PART NUMBER

ICL8038AMJD (Note)

PACKAGE 14 Ld PDIP

PKG. NO. E14.3

NOTE: Add /883B to part number if 883 processing is required.

Pinout

Functional Diagram ICL8038 (PDIP, CERDIP) TOP VIEW

V+ 6

CURRENT SOURCE #1

COMPARATOR #1

I SINE WAVE 1 ADJUST

14 NC

SINE 2 WAVE OUT

13 NC

TRIANGLE 3 OUT

12 SINE WAVE ADJUST

4

11 V- OR GND

5

10 TIMING CAPACITOR

6

9

SQUARE WAVE OUT

8

FM SWEEP INPUT

DUTY CYCLE FREQUENCY ADJUST V+ FM BIAS

7

10

2I C

CURRENT SOURCE #2

COMPARATOR #2

FLIP-FLOP V- OR GND 11

BUFFER

9

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright

© Harris Corporation 1996

8-153

SINE CONVERTER

BUFFER

3

2

File Number

2864.2

ICL8038 Absolute Maximum Ratings

Thermal Information

Supply Voltage (V- to V+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Input Voltage (Any Pin). . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+ Input Current (Pins 4 and 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA

o o Thermal Resistance (Typical, Note 1) JC ( C/W) JA ( C/W) CERDIP Package . . . . . . . . . . . . . . . . 75 20 PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A Maximum Junction Temperature (Ceramic Package) . . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

Operating Conditions Temperature Range ICL8038AM, ICL8038BM . . . . . . . . . . . . . . . . . . . -55oC to 125oC ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . .0oC to 70oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

PARAMETER

VSUPPLY = 10V or +20V, TA = 25oC, RL = 10k , Test Circuit Unless Otherwise Specified

SYMBOL

TEST CONDITIONS

ICL8038CC MIN

TYP MAX

ICL8038BC(BM)

ICL8038AC(AM)

MIN

MIN

TYP MAX

TYP MAX

UNITS

Supply Voltage Operating Range VSUPPLY

Supply Current

V+

Single Supply

V+, V-

Dual Supplies

ISUPPLY

8038AM 8038BM

VSUPPLY = 10V (Note 2)

+10

-

+30

+10

-

+30

+10

-

+30

V

5

-

15

5

-

15

5

-

5

V

-

-

8038AC, 8038BC, 8038CC

12

-

12

15

-

12

15

mA

20

-

12

20

-

12

20

mA

FREQUENCY CHARACTERISTICS (All Waveforms) Max. Frequency of Oscillation

f MAX

100

-

-

100

-

-

100

-

-

kHz

Sweep Frequency of FM Input

f SWEEP

-

10

-

-

10

-

-

10

-

kHz

Sweep FM Range

(Note 3)

-

35:1

-

-

35:1

-

-

35:1

-

FM Linearity

10:1 Ratio

-

0.5

-

-

0.2

-

-

0.2

-

8038AC, 8038BC, 8038CC

0oC to 70oC

-

250

-

-

180

-

-

120

8038AM, 8038BM

-55oC to 125oC

-

-

-

-

350

-

-

250

ppm/oC

Over Supply Voltage Range

-

-

-

0.05

-

0.05

-

%/V

Frequency Drift with Temperature (Note 5)

Frequency Drift with Supply Voltage

%

f/ T

f/ V

0.05

ppm/oC

OUTPUT CHARACTERISTICS Square Wave

-

Leakage Current

IOLK

V9 = 30V

-

Saturation Voltage

VSAT

-

1

-

-

1

-

-

1

A

ISINK = 2mA

-

0.2

0.5

-

0.2

0.4

-

0.2

0.4

V

Rise Time

tR

RL = 4.7k

-

180

-

-

180

-

-

180

-

ns

Fall Time

tF

RL = 4.7k

-

40

-

-

40

-

-

40

-

ns

98

2

-

98

2

-

98

%

-

xVSUPPLY

-

%

Typical Duty Cycle Adjust (Note 6)

D

2

Triangle/Sawtooth/Ramp Amplitude

VTRIAN-

RTRI = 100k

0.30 0.33

-

0.30 0.33

-

0.30 0.33

GLE

Linearity

-

8-154

0.1

-

-

0.05

-

-

0.05

ICL8038 Electrical Specifications

VSUPPLY = 10V or +20V, TA = 25oC, RL = 10k , Test Circuit Unless Otherwise Specified (Continued)

PARAMETER

Output Impedance Sine Wave Amplitude

SYMBOL

TEST CONDITIONS

ZOUT

IOUT = 5mA

VSINE

RSINE = 100k

ICL8038CC MIN

TYP MAX

ICL8038BC(BM)

ICL8038AC(AM)

MIN

MIN

TYP MAX

TYP MAX

UNITS

-

200

-

-

200

-

-

200

-

0.2

0.22

-

0.2

0.22

-

0.2

0.22

-

xVSUPPLY

THD

THD

RS = 1M (Note 4)

-

2.0

5

-

1.5

3

-

1.0

1.5

%

THD Adjusted

THD

Use Figure 4

-

1.5

-

-

1.0

-

-

0.8

-

%

NOTES: 2. RA and RB currents not included. 3. VSUPPLY = 20V; RA and RB = 10k , f 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B. 4. 82k

connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.)

5. Figure 1, pins 7 and 8 connected, VSUPPLY = 10V. See Typical Curves for T.C. vs VSUPPLY. 6. Not tested, typical value for design purposes only.

Test Conditions PARAMETER

RA

RB

RL

C

SW1

Supply Current

10k

10k

Sweep FM Range (Note 7)

10k

Frequency Drift with Temperature Frequency Drift with Supply Voltage (Note 8)

MEASURE

10k

3.3nF

Closed

Current Into Pin 6

10k

10k

3.3nF

Open

Frequency at Pin 9

10k

10k

10k

3.3nF

Closed

Frequency at Pin 3

10k

10k

10k

3.3nF

Closed

Frequency at Pin 9

Sine

10k

10k

10k

3.3nF

Closed

Pk-Pk Output at Pin 2

Triangle

10k

10k

10k

3.3nF

Closed

Pk-Pk Output at Pin 3

Leakage Current (Off) (Note 9)

10k

10k

3.3nF

Closed

Current into Pin 9

Saturation Voltage (On) (Note 9)

10k

10k

3.3nF

Closed

Output (Low) at Pin 9

Rise and Fall Times (Note 11)

10k

10k

4.7k

3.3nF

Closed

Waveform at Pin 9

Max

50k

~1.6k

10k

3.3nF

Closed

Waveform at Pin 9

Min

~25k

50k

10k

3.3nF

Closed

Waveform at Pin 9

Triangle Waveform Linearity

10k

10k

10k

3.3nF

Closed

Waveform at Pin 3

Total Harmonic Distortion

10k

10k

10k

3.3nF

Closed

Waveform at Pin 2

Output Amplitude (Note 10)

Duty Cycle Adjust (Note 11)

NOTES: 7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (f LO). Otherwise apply Sweep Voltage at pin 8 (2/3 VSUPPLY +2V) VSWEEP VSUPPLY where VSUPPLY is the total supply voltage. In Figure 5B, pin 8 should vary between 5.3V and 10V with respect to ground. 8. 10V V+ 30V, or 5V VSUPPLY 15V. 9. Oscillation can be halted by forcing pin 10 to +5V or -5V. 10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V. 11. Not tested; for design purposes only.

8-155

ICL8038 Test Circuit +10V RA 10K

RB 10K

7 4

RL 10K

5

6

9

SW1 N.C. ICL8038

8

3 RTRI

10

11

12 2

C 3300pF

RSINE

82K

-10V

FIGURE 1. TEST CIRCUIT

Detailed Schematic 6

CURRENT SOURCES

R1 8 11K 7

REXT B Q1 Q2

R41 4K

REXT A

5

Q14

4

Q48 R8 5K

Q3

R2 Q 39K 6 Q7

Q8

Q9

10

CEXT

Q11

R7B

R7A

15K

10K

Q12

Q30 R4 100

Q32

R5 100

R13 620 Q24

Q23

R11 270 R12 2.7K Q25

R16 1.8K

Q49 R22 10K

R43 27K Q35 Q27Q28

Q26

10K Q41

R10 5K

R14 27K

9

R15 470 Q29

R35 330

Q43 Q42

R9 5K

Q22

Q19

R6 100

Q33 Q34

R34 375

Q44

R25 33K

R26 33K

R27 33K

R45 33K

R28 33K

R29 33K

R30 33K

R31 33K

Q20 Q21

Q13

Q31

Q45

2.7K R21

Q16Q17

Q10 R3 30K

Q18

Q15

R46 40K

Q46

800 R20

COMPARATOR

1 R33 200

Q47

R19

Q5

Q4

R17 4.7K R18 4.7K

R41 27K

V+

R32 5.2K

R23

Q37 Q36 Q 38

Q39 Q40

3 R44 1K

2.7K R24

Q50 R37 330

Q51 Q52

R38 375

Q53 Q54

800

R39 200

Q55 Q56

R42 BUFFER AMPLIFIER 27K 11

R36 1600

12

R40 5.6K

2

REXT C 82K

SINE CONVERTER

FLIP-FLOP

Application Information (See Functional Diagram) An external capacitor C is charged and discharged by two current sources. Current source #2 is switched on and off by a flipflop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the capacitor is charged with a current I, the voltage across the capacitor rises linearly with time. When this voltage reaches the level of comparator #1 (set at 2/3 of the supply voltage), the flipflop is triggered, changes states, and releases current source #2. This current source normally carries a current 2I, thus the capacitor is discharged with a net-current I and the voltage

across it drops linearly with time. When it has reached the level of comparator #2 (set at 1/3 of the supply voltage), the flip-flop is triggered into its original state and the cycle starts again. Four waveforms are readily obtainable from this basic generator circuit. With the current sources set at I and 2I respectively, the charge and discharge times are equal. Thus a triangle waveform is created across the capacitor and the flip-flop produces a square wave. Both waveforms are fed to buffer stages and are available at pins 3 and 9.

8-156

ICL8038 The levels of the current sources can, however, be selected The falling portion of the triangle and sine wave and the 0 over a wide range with two external resistors. Therefore, with state of the square wave is: the two currents set at values different from I and 2I, an C 1/3V SUPPLY R R C V A B asymmetrical sawtooth appears at Terminal 3 and pulses t = C ------------ = ----------------------------------------------------------------------------------= ------------------------------------2 1 V V 0.66 2RA – R SUPPLY with a duty cycle from less than 1% to greater than 99% are SUPPLY B 2 0.22 ------------------------– 0.22-----------------------R R available at Terminal 9. B A Thus a 50% duty cycle is achieved when RA = RB. The sine wave is created by feeding the triangle wave into a nonlinear network (sine converter). This network provides a If the duty cycle is to be varied over a small range about 50% decreasing shunt impedance as the potential of the triangle only, the connection shown in Figure 3B is slightly more convenient. A 1k potentiometer may not allow the duty cycle to moves toward the two extremes. be adjusted through 50% on all devices. If a 50% duty cycle Waveform Timing is required, a 2k or 5k potentiometer should be used. The symmetry of all waveforms can be adjusted with the With two separate timing resistors, the frequency is given by: external timing resistors. Two possible ways to accomplish 1 1 this are shown in Figure 3. Best results are obtained by f =--------------- =-----------------------------------------------------t1 + t2 R C RB keeping the timing resistors RA and RB separate (A). RA A ------------ 1 +------------------------0.66 2R A – R B controls the rising portion of the triangle and sine wave and the 1 state of the square wave. or, if RA = RB = R The magnitude of the triangle waveform is set at 1/3 VSUPPLY; therefore the rising portion of the triangle is, f = 0.33 ----------- (for Figure 3A) RC

RA C C 1/3 V SUPPLY R A C V t 1 = -------------- = ------------------------------------------------------------------ = -----------------0.66 I 0.22 V SUPPLY

Neither time nor frequency are dependent on supply voltage, even though none of the voltages are regulated inside the integrated circuit. This is due to the fact that both currents and thresholds are direct, linear functions of the supply voltage and thus their effects cancel.

FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50%

FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%

FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS V+ V+ RA 7 4

5

10

11 C

7 4

3

5

8

12 2

11 C

V- OR GND

6

ICL8038
...