Polling and Interrupt notes PDF

Title Polling and Interrupt notes
Course Computer Systems
Institution Swinburne University of Technology
Pages 3
File Size 132.3 KB
File Type PDF
Total Downloads 66
Total Views 135

Summary

Summarises Pollings VS Interrupts...


Description

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All devices need CPU attention Polling and interrupt handle input when CPU busy

Polling:  









polling CPU keeps on checking I/O devices at regular interval whether it needs CPU service Types of polling: polling cycle, roll call polling, hub polling o A polling cycle is the time in which each element is monitored once. The optimal polling cycle will vary according to several factors, including the desired speed of response and the overhead (e.g., processor time and bandwidth) of the polling. o In roll call polling, the polling device or process queries each element on a list in a fixed sequence. Because it waits for a response from each element, a timing mechanism is necessary to prevent lock-ups caused by non-responding elements. Roll call polling can be inefficient if the overhead for the polling messages is high, there are numerous elements to be polled in each polling cycle and only a few elements are active. o In hub polling, also referred to as token polling, each element polls the next element in some fixed sequence. This continues until the first element is reached, at which time the polling cycle starts all over again. Host actions: o The host repeatedly reads the busy bit of the controller until it becomes clear. o When clear, the host writes in the command register and writes a byte into the dataout register. o The host sets the command-ready bit (set to 1). Controller actions: o When the controller senses command-ready bit is set, it sets busy bit. o The controller reads the command register and since write bit is set, it performs necessary I/O operations on the device. If the read bit is set to one instead of write bit, data from device is loaded into data-in register, which is further read by the host. o The controller clears the command-ready bit once everything is over, it clears error bit to show successful operation and reset busy bit (0). Downsides: o CPU has to wait and check whether a device needs servicing which wastes lots of o The CPU will not know when the device needs attention until the device has been polled. This could become a serious problem if the device had to relay critical information Benefits: o CPU is disturbed only when a device needs servicing, which saves CPU cycles. o Can service devices when in a better situation to do so o A lot easier to debug

Interrupt: 

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An interrupt alerts the processor to a high-priority condition requiring the interruption of the current code the processor is executing. The processor responds by suspending its current activities, saving its state, and executing a function called an interrupt handler (or an interrupt service routine, ISR) to deal with the event. Specific interrupt conditions have their own unique interrupt handlers. This interruption is temporary, and, after the interrupt handler finishes, the processor resumes normal activities. Types of interrupt: Hardware and software Hardware: o Asynchronous o Signal sent via electricity Software: o Caused by exception or special instruction (e.g. div by 0) Downsides: o Interrupt becomes inefficient when devices keep on interrupting the CPU repeatedly. o Interrupts a time critical process Benefits: o CPU is disturbed only when a device needs servicing, which saves CPU cycles. Types of handlers: o interrupt handlers are divided into two parts: the First-Level Interrupt Handler (FLIH) and the Second-Level Interrupt Handlers (SLIH). FLIHs are also known as hard interrupt handlers or fast interrupt handlers, and SLIHs are also known as slow/soft interrupt handlers, or Deferred Procedure Calls in Windows....


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