Postnet to Binary (Lab 4) PDF

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Lab4...

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Kamal Wat September 27, 2017 POSTNET to Binary Lab CSE 2300W 002L TA: Haitham

Objectives This lab’s objective is to design and build a circuit that converts POSTNET to binary. Also, this lab will help learn how to minimize equations with truth tables and K-Maps and translate them to the circuit.

Introduction Conversions are best done by making a truth table where the input values and output values can easily be seen and read. POSTNET (Postal Numeric Encoding Technique) is a barcode based code used to represent zip codes. Therefore, a five-digit zip code will have 25 bars as POSTNET is a 2-out-of-5 code meaning only 2 of the 5 inputs will ever be 1, while the others are 0. POSTNET is weighted 74210 and can represent the numeric vales 0 to 9 with its weighting except for 0. Since there are 5 inputs VWXYZ, there will need to be 8 K-Maps created to derive each simplified equation although there are only 4 outputs DCBA with V and D being the MSB respectively. Since there are 16 total inputs that are split among two K-Maps, there will be many do not care states which will help simplify the equations. After these equations are derived, the corresponding circuit on Logicworks can then be created and from there the hardware circuit can be created.

Procedure 1) The first step was to create a truth table for the conversions between POSTNET and binary. From the following chart we can see the decimal value for each 5-bit POSTNET code:

2) From the above chart, a truth table can be made to get the corresponding binary output. After developing the truth table, K-Maps can be created for each output. Since there are five inputs, V and V’ had to have their own respective K-Map for each output, which resulted in 8 K-Maps.

3) After making the K-Maps, the simplified equations can be translated to the circuit via Logicworks with the use of AND and OR gates. The inputs VWXYZ are fed to the AND gates that make each binary input 1. From there, the AND gate’s outputs are fed into an OR gate which is then fed to a binary probe to display their output. 4) After creating the circuit, thoroughly test each input for their corresponding output. 5) After testing the circuit on Logicworks, the circuit can be translated to the protoboard. There will only be 5 out of the 8 inputs used and only the first 4 lights will represent the value of DCBA respectively. An on light represents a 1 while an off light represents a 0. 6) After creating the circuit on the protoboard, thoroughly test for each input to see if produces the expected output.

Results The following is the truth table for the conversions between POSTNET and binary with the decimal representation in the leftmost column. This truth table also represents the results between my inputs and outputs: Decimal 0

V 1

W 1

X 0

Y 0

Z 0

D 0

C 0

B 0

A 0

1

0

0

0

1

1

0

0

0

1

2

0

0

1

0

1

0

0

1

0

3

0

0

1

1

0

0

0

1

1

4

0

1

0

0

1

0

1

0

0

5 6 7 8

0 0 1 1

1 1 0 0

0 1 0 0

1 0 0 1

0 0 1 0

0 0 0 1

1 1 1 0

0 1 1 0

1 0 1 0

9

1

0

1

0

0

1

0

0

1

The following are the K-Maps produced from the above truth table. The highlighted cells show which groupings I made for the minimizations. From these K-Maps, I was able to derive the equations for each output, which is also shown below.

VD WX/YZ

00

01

11

10

00

X

0

X

1

01

1

X

X

X

11

X

X

X

X

10

0

X

X

X

WX/YZ

00

01

11

10

00

X

X

0

X

V'D

01

X

0

X

0

11

0

X

X

X

10

X

0

X

0

WX/YZ

00

01

11

10

00

X

1

X

0

01

0

X

X

X

11 10

X 0

X X

X X

X X

00 X X 1 X

01 X 0 X 1

11 0 X X X

10 X 0 X 1

VC

V'C WX/YZ 00 01 11 10

VB WX/YZ

00

01

11

10

00

X

1

X

0

01

0

X

X

X

11

X

X

X

X

10

0

X

X

X

WX/YZ

00

01

11

10

00

X

X

0

X

V'B

01

X

1

X

1

11

1

X

X

X

10

X

0

X

0

WX/YZ

00

01

11

10

00

X

1

X

0

01

1

X

X

X

11 10

X 0

X X

X X

X X

00 X X 0 X

01 X 0 X 0

11 1 X X X

10 X 1 X 1

VA

V'A WX/YZ 00 01 11 10

Output D C B A

Equation VX+VY VZ+V'W VZ+V'X VX+VZ+V'Y

From these equations I was able to create the following circuit. The circuit has properly labeled inputs and properly labeled outputs. In the picture the input is 10100 which has the

corresponding output of 1001 which matches the truth table. For output A, two 2-way OR gates were used as a 3-way OR gates as the protoboard kit does not come with 3-way OR gates.

This circuit was then converted to the protoboard. The input 10100 is shown on the protoboard which results in the same output seen on the circuit, 1001. The last two lights on the protoboard are constantly on and can be ignored when reading the output.

Discussion The equations derived from the K-Map were fairly simple to translate into Logicworks. When translating the circuit from Logicworks to my protoboard, I tried to color code the wires to help simplify troubleshooting in case something happened that I could not predict. The orange wires go directly from an input to an AND gate. The yellow wires are bridged from orange wires. The white wires are the AND gate outputs while the red wires represent the OR gate outputs.

Conclusion When wiring my circuit, I ran into relatively zero issues. My only problem when powering on my circuit for the first time to test it, I discovered some of my inputs produced the wrong inputs. Since I color coded the wiring, I was able to easily trace my problem to find out that a wire became unplugged. After plugging the wire in, my circuit worked correctly. This proves how color coding wire can help simplify troubleshooting.

Questions 1. Since there are 5 total inputs, the amount of possible outputs are 25=32. However, only 10 inputs are needed to represent the decimal numbers 0-9, therefore there are 3210=22 non-valid inputs.

2. If there was no zero input, my design would not be any simpler. If zero was changed to a

don’t-care state, the groupings on the K-Map would not change for any of the outputs. Therefore, my design would not be conflicted....