Practical - lab report 1, experiment 1 PDF

Title Practical - lab report 1, experiment 1
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Institution University of Wollongong
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Summary

Lab report for experiment, typed, including introduction, methods, results and conclusion ...


Description

Lab Report 1: Experiment 1 Logic Gates and Multisim

4/22/2011

Introduction: The aim of this experiment is to introduce the implementation of logic elements within multisim, such as AND OR and NOT along with the use of a logic converter as a design tool was also presented as a method of obtaining the truth table for a circuit and to find a simplified expression for a circuit. The execution and implementation of binary expressions is also explored and implemented within the simulation software. The experiment introduced many main concepts of logic circuits and the use of simulation software. It was expected that logic expressions could be realised using methods presented in the labs.

Materials and Methods 

National Instruments Multisim software

Section 1 Task 1 

 

Obtain the truth table for the following gates o AND o NAND o OR o NOR o XOR Attach gates to theXLC1 logic converter, and obtain the truth table for each of the gates See figure 5

Task 2/3  Implement the circuit (Figures 1.2, 1.3), and obtain the truth table. Write a Boolean expression for this circuit  Illustrate how two different circuits may have the same functionality with different components.  See figures 6 and 7 Task 4  Implement the circuits, compare the truth tables found  See Figure 8 Task 5  Implement a three input OR gate and a three input XOR gate, obtain the truth table for both gates. Task 6  Implement the following circuit using only 2-input gates o F = A.C.D + A.B + C.B

Task 7  Implement the following function using any gates required o F = AB + A’CD + A’BD + A’CD’ + ABCD     

Obtain the truth table Simplify the expression Implement the simplified expression Obtain the truth table of the simplified expression and verify that they are the same Compare the literal gate input cost

Task 8  Design a temperature monitoring system that sounds an alarm, it the temperature is greater than a maximum value and the temperature is rising or the temperature is less than a set minimum values and the temperature is falling.  Sensor A is on if max temperature is exceeded  Sensor B is on if below min temperature  Sensor C is on if the temperature is rising

Results and Discussion Task 1 A 0 0 1 1

B 0 1 0 1

AND 0 0 0 1

B 0 1 0 1

NAND 1 1 1 0

B 0 1 0 1

OR 0 1 1 1

B 0 1 0 1

NOR 1 0 0 0

Table 1

A 0 0 1 1 Table 2

A 0 0 1 1 Table 3

A 0 0 1 1 Table 4

A 0 0 1 1

B 0 1 0 1

XOR 0 1 1 0

Table 5

The truths tables obtain show the function of each of the logic gates. The output of the XLC1 (logic converter used to generate truth tables) gave the expected output for each gate.

Task 2 Truth Table A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

F 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0

Table 6

The expression, reading from the circuit is: ((C’+D).B).A)’ The truth table match the derived expression (when inputs were simulated) ; this indicates that we are able to use both methods (truth table or expression) of representing a circuit to convey a particular design. However while it is simpler to convey this with the use of the expression, the meaning and application of the circuit is better described with the use of the truth table and the logic gates.

Task 3 Truth Table A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

F 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 0

Table 7

The Boolean expression for this circuit is ((D’.C) + B’) + A’ which is equivalent ((C’+D).B).A)’ as in task 2. The circuits show in figures 1.2 and 1.3 has different implementations of the same circuit. This can be seen from the truth table that is produced, showing that they are identical, in terms of output. This is a critical design feature that can be utilised to create circuits using different components to those specified. In situations when gates are limited, others may be substituted.

Task 4 Truth Table for 2 gate implementation A 0 0 0 0 1 1 1 1 Table 8

B 0 0 1 1 0 0 1 1

C 0 1 0 1 0 1 0 1

0 0 0 0 0 0 0 1

Truth Table for 3 gate implementation A 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1

C 0 1 0 1 0 1 0 1

0 0 0 0 0 0 0 1

Table 9

As we would expect the 2 gate implementation and 3 gate implementation is exactly the same. This enables us to implement different designs based on what gates we have available. This result is also critical in realising that logic gates may be built from combinations of other logic gates.

Task 5 Truth table for two gate implementation A 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1

C 0 1 0 1 0 1 0 1

0 1 1 1 1 1 1 1

Table 10

Truth table for three gate implementation A 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1

C 0 1 0 1 0 1 0 1

0 1 1 1 1 1 1 1

Table 11

The truth tables for a two gate implementation and 3 gate implementation, we would expect to be the same. This is confirmed with the implementation of the circuit in multisim. Similar to task 4 this result is critical in understanding that larger more complex circuits can be made out of smaller components and still produce the same results.

Task 6 F = A.C.D + A.B + C.B The implementation of the circuit is shown below

Figure 1

Truth Table A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

Table 12

C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

F 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 1

The notation used in logic is introduced in the topic,. The logic function “+” means OR and the “.” Means AND. Also operators have higher precedence than OR functions, thus we evaluate ACD, AB etc. before evaluating the OR’s. The results of Task4 and Task5 are requiring completing this task. Using this we are able to form “3 gate “AND’s and “3 gate” OR’s with the use of only 2 input gates. If we were to implement this task using 3 input logic gates then we would expect the same results as we found here (i.e. the same truth table will be produced).

Task 7 Implementation of F = AB + A’CD + A’BD + A’CD’ + ABCD The implementation within multisim is shown below

Figure 2

Truth Table for complex expression A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

F 0 0 1 1 0 1 1 1 0 0 0 0 1 1 1 1

Table 13

The simplified expression was obtained with the use of the XLC1 logic converter; the logic converter enabled a very quick and efficient method of simplifying the expression. The simplified expression obtained was: F = A’C + AB + BD

Figure 3

The truth table for the simplified expression is: A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

F 0 0 1 1 0 1 1 1 0 0 0 0 1 1 1 1

Table 14

As expected the truth table is the same for both the complex and simplified expression. This can be seen by comparison. The use of the logic converter provides a convenient method to simplify circuits. This enables us to produce circuits that may appear complex but the end result may be a simple. It is also interesting to note that the simplified expression does not depend on “C”. This was unexpected, and is only clear that this is the case when the manual simplification of the result takes place. The literal/gate cost of the ‘complex’ expression has a relatively high value, when compared to the ‘simple’ expression. The simplified expression almost reduces the gate cost by 50%. This is critical when designing costs limit a design, efficiency is critical, and limited logic gates exist for use within a design.

Task 8 The expression was derived from the truth table: A

B

C

0 0 0 0 1 1 1 1

0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1

Table 15

ALM = A’.B.C’ + A.B’.C

AL M 0 0 1 0 0 1 0 0

It is assumed within this circuit that if the temperature of sensor C is not rising then it must be falling. The implementation of the circuit within multisim, where the switched A, B, C represent the input signals.

Figure 4

The implementation of the circuit, after the production of the truth table was a trivial task. The truth table is a critical tool that is used in the production, and simplification of circuits. Had this circuit been more complex the use of a k-map would have been necessary to produce the simplest expression. The implementation of the circuit, matches the expression, and using the skills learnt in the last three tasks made the implementation of this circuit simple. This task also introduced a practical application and how we may apply the skills we have learnt to a situation.

Conclusion The tasks followed in this experiment showed that combination logic can be made from a several logic gates. This was clearly illustrated in tasks 3 and 4. The methods demonstrated in these two tasks were critical in the implementation of later tasks. The logic converter was show to be a convenient and simple method of simplifying a circuit, and to produce a truth table. This was seen in all tasks, where a logic converter could be utilised to produce the results. The reduction of a circuit and Boolean expressions was also seen to be a critical factor in the reduction of a circuit to improve efficiency, reduce costs, and to implement designs with limited tools available.

Figures

Figure 5

Figure 6

Figure 7

Figure 8

Bibliography ECTE233 Lab Development Group. (2007). Laboratory Notes Autumn. Wollongong: SECTE. Kime, M. a. (2008). Logic and XOmputer Design Fundamentals. Pearson/Prentic Hall Internation....


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