Title | 1250 Lab report 8 segment Display with VHDL |
---|---|
Course | Fundamentals Of Digital Systems |
Institution | New York City College of Technology |
Pages | 7 |
File Size | 454.7 KB |
File Type | |
Total Downloads | 44 |
Total Views | 144 |
1250 Lab report 8 segment Display with VHDL...
Lab report 8 Segment Display with VHDL
Objective: - Use simple VHDL assignment statements to represent a function table - Introduce the selected signal assignment WHEN-ELSE clause - Display hexadecimal numbers (0 through F) on the 7-segment LED of the DE-2 board
Required Materials: - Quartus II Web Edition V13.0 SP1 software by Intel Corporation
Simulation & experimental: Part I
Part II
Sym
D3
D2
D1
D0
S
S6
S5
S4
S3
S2
S1
S0
0
0
0
0
0
-
1
0
0
0
0
0
0
1
0
0
0
1
1
0
1
0
0
1
0
0
2
0
0
1
0
2
0
1
1
0
0
0
0
3
0
0
1
1
3
0
1
1
0
0
0
0
4
0
1
0
0
4
0
0
1
1
0
0
1
5
0
1
0
1
5
0
0
1
0
0
1
0
6
0
1
1
0
6
0
0
0
0
0
1
0
7
0
1
1
1
7
1
1
1
1
0
0
0
8
1
0
0
0
8
0
0
0
0
0
0
0
9
1
0
0
1
9
0
0
1
0
0
0
0
A
1
0
1
0
A
0
0
0
1
0
0
0
B
1
0
1
1
B
0
0
0
0
0
1
1
C
1
1
0
0
C
1
0
0
0
1
1
0
bol
D
1
1
0
1
D
0
1
0
0
0
0
1
E
1
1
1
0
E
0
0
0
0
1
1
0
F
1
1
1
1
F
0
0
0
1
1
1
0
Conclusion: In this lab experiment, we created a VHDL file in quartus in order to create a function table, a vhdl code, and waveforms. Then we learned about the selected signal assignment WHEN-ELSE clause and displayed the hexadecimal numbers (0 to F) on the 7-segment LED of the DE-2 board....