14a.VHDL System Level - asdf asdfgh asdfg zxcv qwerty sdfgh zxcvbn qwert sdfgh dcfvgbn PDF

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VHDL System Level System design using VHDL but approach is more generally applicable.

Larger structure 

Approach 



Divide the design into modules and then use a structural approach to combine them into the final design. The modules should be of significant size otherwise you tend to end up translating a large schematic into text! AND/OR Use processes to subdivide the modules into pieces that carry out different functions. EEE20001 Digital Electronics Design

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Example 



A circuit is required to count the number of occurrences of two sequences "010" or "1001" in a bit stream. Two instances of the same counter Proposed design:   

16-bit counter for "010" sequence. 16-bit counter for "1001" sequence. State machine to detect sequences and increment the appropriate counter. EEE20001 Digital Electronics Design

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Example cen010 clr010

Mealy State Machine

cen clr

Count of “010”

count010

cen1001 cen clr1001 clr

Count of “1001”

count1001

data reset clock

These could be VHDL processes or modules but this example will uses modules

EEE20001 Digital Electronics Design

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Example 

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State machine to detect either "010" or "1001". Use a Mealy machine as it will have outputs valid early which is useful in controlling the counters on the next clock edge. False outputs are not important since the counters are synchronous and only sensitive to inputs at the clock edge.

Clr1001...