Assembly Format Addr Mode 1 15 15 PDF

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EET 320/325 Microprocessors & Microcontrollers Spring 2015 Assembly Language and Addressing Modes Given Date: 1/15/15 Introduction: Cross assembler allows source programs written and edited on the host computer (example PC) to generate executable code for the target computer (system) such as PIC microcontroller. The executable object file (code) (the .HEX file) can then be downloaded and run on the target system. Assembly Language: A collection of mnemonic symbols that is manufacture dependable. The general format of Assembly Language is: Label

Operation (OpCode)

Operand

Comment

Label

is the first field of a source statement.

Operation

is a legal OpCode mnemonic or an assembler directive.

Operand

may contain a symbol, an expression, or a combination of symbols and expression separated by commas. It is used by specifying the addressing mode of the instruction as well as the operand of the instruction.

Comment

uses a semicolon”;” delineates comments, which is separated from the operand field (or from the operation field if no operand is required) by at least one blank space. An “;” in the beginning makes the entire line a comment.

Assembler Directives: Such as EQU, ORG, DT, etc. Note: We will talk about this later! EQU SFR/GPR/Variable definition ORG Starting address assignment DT Data Table assignment

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Addressing Mode: How does the PIC CPU gain access/operation of the data in its DM?

PIC16F84A Addressing Modes (Unofficial Classification): 1. Inherent Mode Operation within the Opcode, no Operand needed. Example: CLRW NOP SLEEP

2. Immediate Mode Operation directly involves fixed data, the literal. Example: ADDLW MOVLW XORLW

0X?? 0X?? 0X??

3. Direct Mode Operation involves data in DRAM (File Register: SFR or GPR) Example: ADDWF MOVWF MOVF RLF RRF

F,d F F,d F,d F,d

;F is the name of any file register, d is the destination

4. Relative Mode Operation involves relationship of current PC Example: BTFSC BTFSS DECFSZ

F,b F,b F,b

; F is the name of any file register, b is the bit

5. Index Mode or indirect Mode (Not complete indexed operations) Operation involves using FSR as a pointer and INDF as a data holder to manipulate DRAM data movement/operation. Example:

LOOP

MOVLW MOVWF MOVLW MOVWF INCF ADDLW MOVWF BTFSS GOTO

0X0C FSR 0X11 INDF FSR,F 0X01 INDF FSR,4 LOOP

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