ECE 222 Laboratory 1 PDF

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ECE 222 Laboratory 1...

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1 ECE 222 14 February 2019 Lab 1: HSPICE Simulation Part 1: HSPICE Setup For the very first part of this lab, I set up HSPICE using the basic instructions provided via Blackboard, and logged in via SSH to run my netlists. I also worked with my friend Veerendra to trouble shoot some of the issues encountered within this lab. Part 2: Characterize Diodes 1. First, I established the diode circuit by calling the diode from the sedra_lib file, and constructed a basic circuit with the diode and a voltage source. The HSICE code was the following: .include 'sedra_mod_lib' * Diode D1 1 0 D1N4148 v1 1 0 DC 5V .DC v1 -20 2 .1 .plot v(v1) .plot I(d1) .op .option post .END The voltage is varied from -20 to 2 volts to test the diode IV curve of the diode. Below is the diode circuit and the IV curve for the diode: Figure 1: Diode Circuit

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Figure 2: Diode IV curve

While the graph looks a lot like the data sheet, it becomes difficult to see the curve as it reaches the threshold voltage. It is however certainly consistent with typical diode behavior, with no current flow until the diode reaches threshold voltage. 2. To graph the different temperatures, I used the .TEMP function to make separate graph files for 27, 0, 55, 85, and100. Overall, there was not a lot of variance between the temperatures, as can be seen in the graph below:

Figure 3: Diode IV curve for (top) 100, 85, 55, 0, and 27 degrees C (bottom)

3 It appears that the higher temperatures resulted in higher currents, as the graphs illustrate that the currents for highest temperatures end the highest on the graphs as compared with the lower temperatures. 3. To find the saturation current, I employed the .MEASURE tool in HSPICE as follows: .MEASURE DC SatuarationCurent FIND I(D1) +WHEN V(1)=-10 This tool simply measures the current Idsat when the voltage is at some small negative value (-10 V for my measurement). The resulting value for Idsat for 27 degrees Celcius was -3.1818E-09. This is quite close to the actual value specified in the diode model of about [-]2.682E-09. 4. To find the small signal resistance, I again attempted to take advantage of the .MEASURE command. For finding Rd, I used the identity from the recitation slides that rD = VT / Id. The given value for VT of a diode is 25mV, thus by measuring the current at the specified voltage of 1V I was able to find the value for rD: Id = 2.4337E-01, VT = .025V, so rD = .1027 ohms For finding the capacitance Cd, I tried a different method. As it turns out, you can actually just print certain values in HSPICE, and the capacitance of a diode is one of them: .print C(D1) Using this method, I received a value of 1.7069uF. I did also attempt to test this value using .MEASURE again, but I ran into some issues getting it to work properly, as it gave me a capacitance of -1.2346E-29F for 27 degrees Celsius. To its credit, for 55 degrees Celsius I did receive my original value of 1.7069uF. Please see netlist1 for my .MEASURE attempt.

Part 3: Characterize MOSFETs 1. For the NMOS circuit, I constructed a basic circuit connecting the terminals to the correct voltages (including connecting the bulk to ground). For this problem, I used .PARAM and .GLOBAL from some example syntax I found online. This makes the whole process of setting the various voltages within the transistor much easier: .include 'sedra_mod_lib' .PARAM .OPTION post .GLOBAL gd vdd Vgs g gd 0

4 Vds d gd 0 M1 d g gd gd NMOS0P5 W=20um L=0.6um + AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-6 Vvdd vdd 0 3v Vgd gd 0 0v .DC Vds 0 3 0.2 Vgs 0 3 0.2 .PROBE DC I(M1) .print VTH(M1) .print VDSAT(M1) .end The general circuit looked like the following:

Figure 4: NMOS circuit

The graph for the resulting NMOS transistor was as follows:

5 Using the .DC Vin1 0 3 0.2 Vin2 0 3 0.2 sweep function as specified in the lab guide, I generated the graph above from a NMOS transistor with the specified values. 2. To find the Vdsat and the Vt, I employed the built-in HSPICE functions for just that purpose: .print VTH(M1) .print VDSAT(M1) These made the job very easy by simply printing the values of the NMOS transistor for each current value, meaning we received a rather broad collection of values specifically for the Vdsat. The Vt remained at a steady .7V, while the Vdsat ranged from .1V to .3V, .5V, .7V, .9V, 1.1V, 1.3V, 1.5V, 1.7V, 1.9V, 2.1V, and 2.3V, depend ending on which IV curve we examine. The graph below shows the saturation voltage for each current:

Figure 6: Vdsat

3. For testing and finding the unity gain frequency of NMOS transistor, I tried running an AC analysis of the current out Io as compared to the current in Ii. According to page 715 of the textbook, when the current out divided by the current in gain is equal to 1, that is the unity gain frequency. So, I constructed a circuit with the NMOS transistor and tried to find my unity gain frequency by looking for where the gain was equal to 1. After some time, I eventually found a decent test range to be from 10GHZ to 100GHZ. This gave a unity gain frequency at about exactly 100GHZ. For the test, I used the following code:

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.include 'sedra_mod_lib' M1 1 2 0 0 NMOS0P5 W=20um L=0.6um + AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-6 Vdd 1 0 DC 3V Vin 2 0 DC 3V AC .001 .DC Vin 1 2 1 Vgs 0 3 0.2 .AC LIN 100 10G 200G .PROBE DC I(M1) .print gain=PAR('I(Vin)/I(Vdd)') .option post .end

4. For the next part, I completed all of the above steps, but this time for the PMOS transistor. First, I again utilized the parameter function to make the process simpler: .include 'sedra_mod_lib' * like #define .param power=3 .OPTION POST .global Vdd gnd Vdd Vdd gnd 'Supply' *PMOS M1 ds gs Vdd Vdd PMOS0P5 W=20um L=0.6um + AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-6 vds Vdd ds 'power' vgs Vdd gs 'power' .DC Vds 0 3 0.2 Vgs 0 3 0.2 .PROBE DC I(M1) .print VTH(M1) .print VDSAT(M1) .END

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This created the following circuit, with the graph below:

Figure 7: PMOS circuit

5. Next, to find Vt and Vdsat, I again used the built in HSPICE functions for MOSFET transistors: .print VTH(M1) .print VDSAT(M1)

Again, I was able to graph the result:

Figure 8: IV Curves for PMOS

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6. Like the NMOS unity gain, I went about with a similar approach to testing for the unity gain frequency of the PMOS. However, I had a bit of trouble getting the code to work. After hours of debugging, I eventually had to give up on finding the proper transistor tuning for finding the unity gain. My main issue was that I would only receive constant gain values for each frequency, however they should have been changing. Figure 9: Vdsat for PMOS

Part 4: Voltage Doubler Circuit

9 For the last part of the lab, I created the following circuit from the lab guide:

Figure 10: Voltage Doubler Circuit

Using the diodes from the ‘sedra_lib’ file, I constructed the circuit with the following code: * Input digital signal .include 'sedra_mod_lib' * Diode D1 2 0 D1N4148 C1 1 2 1u D2 3 2 D1N4148 C2 3 0 1u V1 1 0 AC SIN(0 10V 1k 0 0 0) .TRAN 1ns 1000ns START=1ns ** Output .TRAN (1ns) (10ms) .PROBE TRAN v(D1) .op .option post .END Initially I had some trouble getting the graph to work, but I found the .TRAN (start) (end) function to be very useful for solving this. I also had a problem where one of my diodes was not properly biased, as it was placed in the circuit in the wrong direction. Upon resolving these issues, I then measured the voltage at nodes two (V2) and three (Vout), which resulted in the following graphs:

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Figure 11: V2 (top) and Vout (bottom)...