ECE 222 Laboratory 2 PDF

Preview

Summary

ECE 222 Laboratory 1...

Description

1 ECE 222 5 March 2019

Lab 2: Active-Loaded Differential Amplifiers Part 1: Current Mirror 1. Calculate the gate width I began solving for the gate with by doing some basic circuit analysis and relationship mapping between equations. The first way to solve for gate width is to use the saturation equation for MOSFETs since Vds and Vgs are both equal because of the short circuit from drain to gate (this means M1 is in saturation region). This means that solving for the width is simply a matter of plugging into this equation:

Figure 1: Saturation Equation

However, there is an even easier way to go about solving this problem, using equation 8.4 from the textbook, which is derived from relating M1 and M2 together via the above equation. The equation is as follows:

Figure 2: Current relation equation

Using this equation was simply a matter of proportions from the dimensions of M1 to M2. Because we used a given length of .6 micrometers, and the value of Io/Iref was equal to 10, it became clear that the width for M2 simply had to be 10 times greater than width of M1. Using 20 micrometers as width for M1, I got 200 micrometers for M2.

2 2. Next, I began simulating my circuit. As stated in the lab instructions, I was allowed to simply re-use AS/AD/PS/PD as in lab 1. To actually do the simulation, I first programmed my netlist with all of the circuit components as seen in this circuit diagram:

Figure 3: Current Mirror Diagram

Note that for the values of my transistors, I used two NMOS transistors with M1 being W=20 micrometers and M2 being W=200 micrometers. Both lengths L were equal to .6 micrometers. My resulting netlist was the following: .include 'sedra_mod_lib' Vdd 2 0 DC=3.3V Vout 3 0 DC=.6V Iref 2 1 DC=100uA M1 1 1 0 0 NMOS0P5 W=2u L=0.6u + AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-6 M2 3 1 0 0 NMOS0P5 W=200u L=0.6u + AS=20E-12 AD=20E-12 PS=22E-6 PD=22E-6 .DC Vout 0 3 0.2 .PROBE DC I(M2) .Print DC I(M2) .Plot DC I(M2) .op .option post .end As I realized later, the inclusion of Vdd is really more of a formality and unnecessary for the circuit, as the current source will drive the current no matter what the value of Vdd is.

3 Once I had created my circuit, I ran the DC sweep of Vout from 0 Vto 3V, and received the following graph:

Figure 4: Iout/Vout curve of current mirror

As the graph indicates, the current rises until around .2V, then begins a more gradual climb after reaching ~1mA (note how this is 10 times greater than Iref which is .1mA). 3. To find the value of Vout for which Iout/Iref = 10, I simply had to examine the IV graph for the transistor M2 and find where the current was equal to 1mA. This method was viable because Iref was set to .1mA, therefore to achieve a factor of 10 we simply needed to go to the point where Vout gave a result of 1mA (1mA/.1mA = 10). From the graph, I was able to identify Vout as .855 when the current gain was exactly 10. For the analytical analysis, I simply checked my graph results by plugging into the saturation equation (using the formula as seen above). I already knew my expected Iout, so it made it easy to solve for Vout especially because we had already calculated Vg from saturation equation for M1. My result for Vout at exactly 1mA was ~.87V. Although it is slightly higher than the value I received for Vout from my measurement, it is still close enough to consider both values to be correct. 4. To find the small signal resistance Rout, I initially attempted to use a .measure statement in my netlist with the DERIVATIVE function. However, every time I tried running the measurement, it failed. I was never quite sure why, but I decided to try a different method instead. As we know from the textbook, taking the slope of the IV curve at a given point gives you the value 1/Rout. This essentially means we need to take the derivative of the IV curve at a given point, and then divide the result into 1 to get the actual value for Rout. This was also the thinking behind my first attempt, but it applies even more so to my second method. To get Rout, I first copied the IV graph in Cscope, then opened the calculator option and pasted the graph into the calculator. Next, I applied the derivative function to the entire graph, and graphed the resulting waveform. This gave me the value of 1/Rout for each value

4 of Vout. After completing the final calculation by dividing my result into 1, I received ~10.8Kohms for both Vout=.6V and 1V. These values did not change from my measurement at .6V to my second measurement at 1V, as can be seen in the derivative graph below. This happens t 6V.

The graph shows the derivative of the IV curve remains constant through .6V to 1V, thus explaining the lack of change in my resistor values. 5. After checking my circuit parameters and comparing them to the requirements set forth in the lab guide, I realized that my circuit met the parameters of Rout > 5Kohms when Vout = .6V and Iout 1mA. 6. To demonstrate that I could alter the current ratio by design, I decided to show that simply changing the width of just one of the transistors could have a major change on the current Iout. I chose to adjust the width of M1, starting at 200 micrometers. This resulted in an Iout of 100 microamperes. After changing the width again to 2000 micrometers, Iout changed to 10 microamperes. Lastly, I tried a width of 2 micrometers and got a value for Iout of 9.7 mA. Clearly, the smaller the width the greater the current gain, and going the other direction, the greater the width the smaller the current gain. 7. I ran an AC analysis using the following HSPICE command: .AC DEC 10 1 1MEG I ran the AC analysis for Vout = .6V and 1V AC, using the .PROBE AC IV=Par('V(3)/I(M2)') command to graph the IV curve at the small signal behavior. The point of this is to find the value of Rout, and it essentially uses the basic idea of the derivative of the IV curve to locate the value

5 as in question 4. As the graph indicates, the value of Rout remains pretty steady at about 10.855 kohms. This is extremely close to my value of 10.8 kohms calculated in part 4, and pretty much the exact same value.

Figure 6: Graph of output Rout from 1Hz to 1MHz

The graph shows my Rout keeping a constant value until around 50kHz, when it starts to decrease.

6 Part 2: Active-Loaded Differential Amplifier 1. To construct the differential amplifier using an active load instead of resistors, I started with simplest items first and worked my way up. To get started, I first drew a circuit diagram with my components and my current mirror from part 1. For the current mirror, I kept the previous values to ensure that it acted correctly as a current source. I drew the following circuit diagram, and later chose values for each of my components:

Figure 7: Differential amplifier with active load diagram

I initially chose a set of values for the lengths and widths, and began testing by measuring the output dB gain at node five. With all lengths equal to the standard .6 micrometer and setting all lengths to 200 micrometers, I began testing the circuit. For my Vg1 and Vg2, I decided to start with 1V for both. 2. In my first tests, I was able to see from the HSPICE file output that all of my transistors were initially in saturation region. However, after a quick AC analysis, I realized that my decibel gain was not nearly high enough. I continued testing, with a variety of different values for my widths. After a significant time, I discovered that I could achieve an extremely close gain of Av of around 10.1V/V by setting my PMOS transistors to 1 micrometer and setting my M5 to 100 micrometers and my M6 to 30 micrometers.

7 3. Using my new gain circuit with adjusted widths, I went about finding fT. To find it’s value, I examined the frequency where I received the highest value of gain before it began to drop off. I received a value of around 316 MHz, as seen from the graph below. *Note that this graph is displayed in decibels, but using the formula db = 20log(Av) you can calculate the corresponding decibels to the expected gain of 10V/V, which is 20 dB:

Figure 8: Gain and frequency f

However, soon I realized I had an issue in that my transistors we not all in the pinch off region. This meant that I would have to go back and re-evaluate my design. But having come so far, I decided to continue on with the remaining measurements before going back to re-adjust my width values. That said, I decided to move on the step 4. 4. With my faulty circuit, I decided to look for fH as to not waste the opportunity for a measurement. To find this value, I first had to take my maximum gain—which was about 10.1V/V—then I had to divide it by the SIN function RMS value (square root of 2). This gave me a resulting gain of 7.14V/V—the value at which my frequency would occur. Checking for this value against the graph, I had to double the result to get 14.2 dB. The frequency at which this occurred was approximately 1.6GHz.

I continued testing my values, trying to adjust my sizes to get the perfect gain while also achieving saturation in all transistors. This proved to be more difficult than I imagined, but in the process I found some really cool effects, namely how I could push the gain to as high as 28V/V. As the graph below shows, the gain for the circuit was extremely high when using 1 micrometer for both PMOS transistor width and then 40 micrometers for M4 and 100 micrometers for M3.

8

Figure 9: Gain of 28V/V

5. What is the relationship between bandwidth and gain? From my many analyses and attempts, one thing has become clear: it is very difficult to achieve both great bandwidth and great gain. In fact, the relationship is a tradeoff between bandwidth and gain. You can have one or the other, but getting both is very difficult. I found that when I had a greater gain in my circuit, the bandwidth would always be cut short, whereas when I had a really good bandwidth, the gain would be quite small. Formulated analytically, X/Av=BW*Y expresses the general idea of how increasing either one in a general equation results in a direct decease in the other.

9

Ful lSpi cene t l i s t s: Par t1: * *Cur r entMi r r or * * * *Ci r cui tDescr i pt i on* * . i nc l ude' sedr a_ mod_ l i b' Vdd20DC=3. 3V Vout30AC SI N( . 6V) * Vout30AC SI N( 1V) * Vout30DC=3. 3V I r e f21DC=100uA M11100NMOS0P5W=20uL=0. 6u +AS=20E12AD=20E12PS=22E6PD=22E6 M23100NMOS0P5W=200uL=0. 6u +AS=20E12AD=20E12PS=22E6PD=22E6

. measur eDC RoutDERI VATI VEI ( M2)WHEN V( 2) =. 6V* f ormeasur i ngRout + . DC Vout03. 30. 2 . AC DEC 1011MEG

. PROBEAC I V=Par ( ' V( 3) /I ( M2) ' ) . pr i ntAC I ( M2) . pr i ntAC V( M2) . PROBEDC I ( M2) . Pr i ntDC I ( M2) . Pl otDC I ( M2) . op . opt i onpos t . end

10

Par t2: * *NMOS* * * *Ci r cui tDescr i pt i on* * . i nc l ude' sedr a_ mod_ l i b' . par am Vg=1 * * * * * * * * * *di ffampl i fier* * * * * * * * * * * * * Vdd60DC=3. 3V Vg170AC SI N( Vg) Vg280AC SI N( Vg) M34466PMOS0P5W=1uL=0. 60u* 1* 1* 1 * 1 +AS=20E12AD=20E12PS=22E6PD=22E6 M45466PMOS0P5W=1uL=0. 60u* 1* 1* 1 +AS=20E12AD=20E12PS=22E6PD=22E6 M54733NMOS0P5W=100uL=0. 6u* 100* 100* 10 +AS=20E12AD=20E12PS=22E6PD=22E6 M65833NMOS0P5W=60uL=0. 6u* 20* 30* 10 +AS=20E12AD=20E12PS=22E6PD=22E6 * * * * * * * * * *di ffampl i fier* * * * * * * * * * * * * * Vout30DC=3. 3V * * * * * * * * * * *c ur r e ntsour c e* * * * * * * * * * * * * I r e f01DC=100uA M11100NMOS0P5W=20uL=0. 6u +AS=20E12AD=20E12PS=22E6PD=22E6 M23100NMOS0P5W=200uL=0. 6u * t r yw=350 +AS=20E12AD=20E12PS=22E6PD=22E6 * * * * * * * * * * *c uur entsour c e* * * * * * * * * * * * * . DC Vout03. 30. 2 . AC DEC 101k100G

* 1

* 100

* 30

11

. PROBEAC I V=Par ( ' V( 3) /I ( M2) ' ) . pr i ntAC I ( M4) . pr i ntAC V( M4) . PROBEDC I ( M2) . Pr i ntDC I ( M2) . Pl otDC I ( M2) . pr i ntAC Gai n=Par ( ' V( 5) /V( 8) ' ) . PROBEAC V( 5) . Pr i ntAC V( 5) . Pl otAC V( 5) . op . opt i onpos t . end...