Final Exam 7 2016, questions and answers PDF

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FINAL EXAMINATION SEMESTER ISESSION 2019/COURSE CODE:SKEE 1073COURSE:ELECTRONIC DEVICES & CIRCUITSLECTURER:TN. HJ. MUHAMMAD ARIF ABDUL RAHIMDR. PUSPA INAYAT KHALIDPROGRAMME : SKEE, SKEL, SKEMSECTION : 01 , 02TIME:2 ½ HOURSDATE:5 th JANUARY 2020INSTRUCTION TO CANDIDATE :ANSWER ALL QUESTIONS.W...

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CONFIDENTIAL

FINAL EXAMINATION SEMESTER I

SESSION 2019/2010 COURSE CODE

:

SKEE 1073

COURSE

:

ELECTRONIC DEVICES & CIRCUITS

LECTURER

:

TN. HJ. MUHAMMAD ARIF ABDUL RAHIM DR. PUSPA INAYAT KHALID

PROGRAMME

:

SKEE, SKEL, SKEM

SECTION

:

01 , 02

TIME

:

2 ½ HOURS

DATE

:

5th JANUARY 2020

INSTRUCTION TO CANDIDATE

:

ANSWER ALL QUESTIONS. WRITE YOUR ANSWER IN THE ANSWER BOOKLET.

THIS EXAMINATION BOOKLET CONSISTS OF 12 PAGES INCLUDING THE FRONT COVER

2 SKEE 1073

PART A (CLO1, PLO1) [20 marks] ANSWER ALL QUESTIONS. WRITE YOUR ANSWER IN THE ANSWER BOOKLET. Q.1 State the effect that forward bias has on the depletion layer width, junction resistance, and current characteristics of a PN junction? (3 marks) Q.2 Explain what happens to the forward bias voltage, V F, of a diode when temperature increases. (3 marks) Q.3 Sketch the output voltage waveform in time domain for the circuit shown in Figure A.1. Discuss the need for biasing the transistor in the circuit. (3 marks) VCC = 10 V

vi = 2 sin ωt V

vo RE = 1.5 kΩ

Figure A.1 Q.4 A transistor amplifier circuit can be splitted into a DC analysis, with all ac sources set equal to zero, and an ac analysis, with all DC sources set equal to zero. Explain why this can be done. (3 marks) Q.5 Compare a cascaded CE-CE with CS-CE configurations and explain the differences in their voltage gain and input impedances. (4 marks) Q.6 Explain why in linear operation of an op-amp, voltage at the inverting input is assumed to be equal to the voltage at the non-inverting input. (4 marks)

3 SKEE 1073

PART B (CLO2, PLO1) [80 marks] ANSWER ALL QUESTIONS. WRITE YOUR ANSWER IN THE ANSWER BOOKLET. Q.1

(a)

Refer to Figure B.1(a), suppose that you had to manually maintain the output voltage of a DC generator constant. Your one and only control over voltage is the setting of a rheostat.

Figure B.1(a) What would you have to do to maintain the load voltage constant if the load resistance changed so as to draw more current? Justify your answer. (3 marks) (b)

Describe how a zener diode in Figure B.1(b) is able to maintain regulated (nearly constant) voltage across the load, despite changes in load current. (2 marks)

Figure B.1(b)

4 SKEE 1073

(c)

The zener diode regulator circuit shown in Figure B.1(c) has VS = 20 V, VZ = 10 V, PZ(max) = 400 mW, IZK = 0.25 mA, and RS = 220 Ω. RS +

+

VS

VZ IZ

-

RL

-

Figure B.1(c) i.

What is the condition for VS and VZ if the circuit to properly function as voltage regulator? (2 marks)

ii.

Describe the importance of RS in the circuit. (2 marks)

iii.

Determine the minimum and maximum values of RL that will make the output voltage regulates at 10 V. (6 marks)

(d)

Let VD = 0.7 V for each diode in the circuit shown in Figure B.1(d). Determine ID1 and Vo. (5 marks) D2

R1 = 5 kΩ

VO

V1 = 10 V ID1 D1

R2 = 10 kΩ

V2 = -10 V

Figure B.1(d)

5 SKEE 1073

Q.2

(a)

A common-emitter amplifier is shown in Figure B.2(a). 10 V 80 k

R1

RC

4 k

C2

C1

300 

RL

Rs 20 k

R2

Vs

1 k

RE

CE

Figure B.2(a) i.

Describe the function of each of the following component/s. -

C1 C2 CE R1, R2, RC and RE (4 marks)

ii.

If this circuit is an audio amplifier, what do Vs and RL represent? (2 marks)

iii.

The Bode-plot frequency response of the circuit at low frequency is shown in Figure B.2(b). Determine the capacitance for the dominant cut-off frequency. Given that β = 100, VBE = 0.7 V and VT = 26 mV. (8 marks)

fLCE 10 Hz

fLC2 20 Hz

fLC1 100 Hz

Figure B.2(b)

6 SKEE 1073

(b)

Derive and calculate the input impedance, Zi of the circuit in Figure B.2(c). Given that IDQ = 3.2 mA and k = 1 mA/V2. (6 marks) 6V

RD 1 k

Vo

RS 1 k

Vsig Zi

-6V

Figure B.2(c)

7 SKEE 1073

Q.3 (a)

Describe some of the benefits using multistage amplifier rather than single stage amplifier? (2 marks)

(b)

In a two stage amplifier, why it is important to determine the value of Zin of the second stage? (2 marks)

(c)

Between the direct-coupled and capacitively coupled amplifier circuit, which of these two coupling methods would be more suitable for use in amplifying DC voltage? (2 marks)

(d)

The parameters for the transistors in the amplifier circuit shown in Figure B.3 are: Q1: VT = 2V and k = 4 mA/V2 Q2: β = 250 and VBE = 0.7 V V+ = 15 V

ICQ RC = 2.4 kΩ

RB1 = 27 kΩ

vo RG1 = 1 MΩ

C1 vi

Q2

Q1 RB2 = 10 kΩ

RG2 = 270 kΩ

Zi2

Figure B.3

C2

8 SKEE 1073

i.

Calculate rπ. (5 marks)

ii.

Draw the ac equivalent circuit at mid-frequency. (3 marks)

iii.

Determine the input impedance of the second stage, Zi2. (2 marks)

iv.

Determine the mid-band voltage gain of the amplifier, Av = vo/vi, if gm1 = 9.52 mS and gm2 = 0.22 S. (4 marks)

9 SKEE 1073

Q.4

(a)

Figure B.4(a) shows an op-amp circuit.

Rf R1

Vs

 

Vo

Zi Figure B.4(a) i.

How do you recognize the circuit is an amplifier? (1 mark)

ii.

How do you recognize this is an inverting amplifier? (1 mark)

iii.

State why the circuit is named inverting amplifier? (2 marks)

iv.

Write the expression for the gain Vo/Vs in terms of circuit resistances? (1 mark)

v.

Write the input impedance, Zi in terms of circuit resistances? (1 mark)

10 SKEE 1073

(b)

Figure B.4(b) is an improvement of the circuit in Figure B.4(a) which could provide a better input impedance. Calculate the voltage gain, Vo/Vs. (8 marks)

Vs

R1  1 k

Vo

 Rf 5 k

Figure B.4(b)

R2

2.5 k

R3

1 k

11 SKEE 1073

(c)

The input (Vs) and output (Vo) waveforms for the circuit in Figure B.4(c-i) are shown in Figure B.4(c-ii). V1 is a DC voltage. Calculate V1 and R. (6 marks)

VCC Vs

1 k  

V1

Vo

2 k  VCC R Figure B.4(c-i) Vs(V) 12 9

t (rad)

0 3

 12 Vo(V) 15

t (rad)

0

 15

Figure B.4(c-ii)

12 SKEE 1073

Appendix A List of Equations

 VVD  I D  I S  e T  1     Vrms  Vr (rms )  r

V AVG  V DC 

Vp Vr( pp)

2 fRL C

VDC  Vp 

2 3

Vr ( rms ) 1  VDC 4 3 fRLC

 



Vp

V r( pp) 

2

2V p

1 Vr ( pp) 2

 1 

I C  I B

I E  I B  IC

I D  k VGS  V GS (TH ) 

2

k

V

I D (ON )

 VGS( TH) 

2

GS( ON)

r 

 gm

gm  2kVGS  VGS (TH )   2 kI D

ro 

VA IC

C Mi  C 1  AV

 1 CMo  C 1  A  V

gm 

IC VT



  

CONFIDENTIAL

FINAL EXAMINATION SEMESTER I

SESSION 2019/2010 COURSE CODE

:

SKEE 1073

COURSE

:

ELECTRONIC DEVICES & CIRCUITS

LECTURER

:

TN. HJ. MUHAMMAD ARIF ABDUL RAHIM DR. PUSPA INAYAT KHALID

PROGRAMME

:

SKEE, SKEL, SKEM

SECTION

:

01 , 02

TIME

:

2 ½ HOURS

DATE

:

5th JANUARY 2020

INSTRUCTION TO CANDIDATE

:

ANSWER ALL QUESTIONS. WRITE YOUR ANSWER IN THE ANSWER BOOKLET.

THIS EXAMINATION BOOKLET CONSISTS OF 15 PAGES INCLUDING THE FRONT COVER

2 SKEE 1073

PART A (CLO1, PLO1) [20 marks] ANSWER ALL QUESTIONS. WRITE YOUR ANSWER IN THE ANSWER BOOKLET. Q.1 State the effect that forward bias has on the depletion layer width, junction resistance, and current characteristics of a PN junction? (3 marks)- C1 Forward bias will reduce the depletion layer width and junction resistance and thus allow more current to pass through the junction. Q.2 Explain what happens to the forward bias voltage, V F, of a diode when temperature increases. (3 marks)- C1 VF decreases. When temperature increases, the heat energy induces the release of electron from the valence band (covalent bonds are broken). Thus, more carriers are generated. The increase in carrier number typically leads to higher electrical conductivity. Thus, smaller voltage is required to conduct current at larger temperature. Q.3 Sketch the output voltage waveform in time domain for the circuit shown in Figure A.1. Discuss the need for biasing the transistor in the circuit. (3 marks)- C2 VCC = 10 V

vi = 2 sin ωt V

vo RE = 1.5 kΩ

Figure A.1 VCC = 10 V

vi

vo vi = 2 sin ωt V VB = 2.7 V

vo RE = 1.5 kΩ

To overcome the rectified output waveform, the transistor needs to be biased so that the input signal can oscillate at the bias voltage. This will make the minimum value of the input signal is greater than VBE and thus all the input signal can pass through the transistor.

3 SKEE 1073

Q.4 A transistor amplifier circuit can be splitted into a DC analysis, with all ac sources set equal to zero, and an ac analysis, with all DC sources set equal to zero. Explain why this can be done. (3 marks)- C2 Superposition principle can be applied in the analysis of a linear circuit. The transistor can be assumed to nearly operate as linear device when it is properly biased. Q.5 Compare a cascaded CE-CE with CS-CE configurations and explain the differences in their voltage gain and input impedances. (4 marks)- C2 (i) (ii)

CECE very high gain medium input impedance

(i) (ii)

CSCE medium gain as gain of CS is not high high input impedance

Q.6 Explain why in linear operation of an op-amp, voltage at the inverting input is assumed to be equal to the voltage at the non-inverting input. (4 marks)- C3

V+

 Vi

V



Vo

Vo = Av Vi = Av (V+  V) Vo is limited to  VCC because of very high open-loop gain Av. In the linear region, Vi is very small,  V+  V

4 SKEE 1073

PART B (CLO2, PLO1) [80 marks] ANSWER ALL QUESTIONS. WRITE YOUR ANSWER IN THE ANSWER BOOKLET. Q.1

(a)

Refer to Figure B.1(a), suppose that you had to manually maintain the output voltage of a DC generator constant. Your one and only control over voltage is the setting of a rheostat.

Figure B.1(a) What would you have to do to maintain the load voltage constant if the load resistance changed so as to draw more current? Justify your answer. (3 marks)- C2 Increase in load current will cause decrease in current flowing through the rheostat. This will reduce the output voltage. Thus, to make the output voltage constant, the rheostat resistance must be increased. (b)

Describe how a zener diode in Figure B.1(b) is able to maintain regulated (nearly constant) voltage across the load, despite changes in load current. (2 marks)- C1

Figure B.1(b) Zener diode is designed for operation in the reverse-breakdown region by limiting its current to a value within the capabilities of the device. The variations in the load current causes variations in the zener current; the Zener conducts the least current when the load current is the highest and it conducts the most current when the load current is the lowest. As long as the variation in zener current is within its specified limits, the zener diode will maintain the voltage across the load regardless of variations in the load current.

5 SKEE 1073

(c)

The zener diode regulator circuit shown in Figure B.1(c) has VS = 20 V, VZ = 10 V, PZ(max) = 400 mW, IZK = 0.25 mA, and RS = 220 Ω. RS +

+

VS

VZ IZ

-

RL

-

Figure B.1(c) i.

What is the condition for VS and VZ if the circuit to properly function as voltage regulator? (2 marks)- C1

ii.

For the circuit to properly function as voltage regulator, the zener diode must work in reverse breakdown region. For that purpose, the supply voltage VS must be greater than the zener voltage VZ and VZ must be less than VOC across the zener diod. Describe the importance of RS in the circuit. (2 marks)- C1

iii.

To limit the current flow through the diode so that the zener current remains within its specified limits (between its knee current and maximum current ratings). Determine the minimum and maximum values of RL that will make the output voltage regulates at 10 V. (6 marks)- C3 𝐼𝑆 =

𝑉𝑆 − 𝑉𝑍 𝑅𝑆

𝐼𝑍(𝑚𝑎𝑥) =

=

20 − 10 = 45.45 𝑚𝐴 220

1

𝑃𝑍(𝑚𝑎𝑥) 400 𝑚 = 40 𝑚𝐴 = 10 𝑉𝑍

1

𝐼𝐿(𝑚𝑖𝑛) = 𝐼𝑆 − 𝐼𝑍(𝑚𝑎𝑥) = 45.45 𝑚 − 40 𝑚 = 5.45 𝑚𝐴 𝑅𝐿(𝑚𝑎𝑥) =

1

𝑉𝑍 10 = 1.83 𝑘Ω = 𝐼𝐿(𝑚𝑖𝑛) 5.45 𝑚

1 1

𝐼𝐿(𝑚𝑎𝑥) = 𝐼𝑆 − 𝐼𝑍(𝑚𝑖𝑛) = 45.45 𝑚 − 0.25 𝑚 = 45.2 𝑚𝐴 𝑅𝐿(𝑚𝑖𝑛) =

10 𝑉𝑍 = = 221.24 Ω 𝐼𝐿(𝑚𝑎𝑥) 45.2 𝑚

1

6 SKEE 1073

(d)

Let VD = 0.7 V for each diode in the circuit shown in Figure B.1(d). Determine ID1 and Vo. (5 marks)- C2 R1 = 5 kΩ

D2 VO

V1 = 10 V ID1

R2 = 10 kΩ

D1

V2 = -10 V

Figure B.1(d) 𝑉𝐷1 = 𝑉𝐷2 = 𝑉𝐷 𝑉𝐷1 = 𝑉𝐷2 + 𝑉𝑂

Therefore, Vo = 0 V

→

1

𝑉𝐷 = 𝑉𝐷 + 𝑉𝑂

1 𝐼𝐷2 = 𝐼𝑅2 = 𝐼𝑅1 =

𝑉𝑂 − 𝑉2 0 − (−10) = 1 𝑚𝐴 = 10 𝑘 𝑅2

𝑉1 − 𝑉𝐷1 𝑅1

=

10 − (0.7) = 1.86 𝑚𝐴 5𝑘

1

1

𝐼𝐷1 = 𝐼𝑅1 − 𝐼𝐷2 = 1.86 𝑚 − 1 𝑚 = 0.86 𝑚𝐴 1

7 SKEE 1073

Q.2

(a)

A common-emitter amplifier is shown in Figure B.2(a). 10 V 80 k

4 k

RC

R1

C2

C1

300 

RL

Rs 20 k

R2

Vs

1 k

RE

CE

Figure B.2(a) i.

Describe the function of each of the following component/s. -

C1 C2 CE R1, R2, RC and RE (4 marks)- C1

C1  to block DC current to the source to couple ac signal to the amplifier C2  to block DC current to the load to couple ac signal to the load CE  to bypass ac signal to ground

ii.

R1, R2, RC, RE biasing resistors to bias the transistor in active mode If this circuit is an audio amplifier, what do Vs and RL represent? (2 marks)- C1 Vs – microphone, RL – speaker

8 SKEE 1073

iii.

The Bode-plot frequency response of the circuit at low frequency is shown in Figure B.2(b). Determine the capacitance for the dominant cut-off frequency. Given that β = 100, VBE = 0.7 V and VT = 26 mV. (8 marks)- C3

fLCE 10 Hz

fLC2 20 Hz

fLC1 100 Hz

Figure B.2(b) VTH = VCC x R2/(R2 + R1) = 2 V RTH = 20k // 80k = 16 kΩ IB =

2

VTH − VBE = 11.1 μA R TH + (β + 1)R E 1

IC = β IB = 1.11 mA r = βVT/IC = 2.34 kΩ

1

1

Dominant cut-off frequency is due to C1. C1

Rs RBB

r

1

Vs

fLC1 = 1/ [2  (Rs + RBB // r) C1] = 100

 C1 = 0.68 µF

2

9 SKEE 1073

(b)

Derive and calculate the input impedance, Zi of the circuit in Figure B.2(c). Given that IDQ = 3.2 mA and k = 1 mA/V2. (6 marks)- C2 6V

RD 1 k

Vo

RS 1 k

Vsig

-6V

Zi

Figure B.2(c) ac equivalent circuit: g

d

gmVgs

Vgs

RD

s

iSig

RL

Rsig RS Vsig

Zi

1

Vi

gm = 2√(kIDQ) = 3.58 mS 2

Zi = Vi / isig Vi = (isig + gmVgs)RS

1

But Vgs + Vi = 0  Vgs =  Vi Vi = isig RS – gmRS Vi  Vi / isig = Zi = RS / (1 + gm RS) = 218 Ω

2

10 SKEE 1073

Q.3 (a)

Describe some of the benefits using multistage amplifier rather than single stage amplifier? (2 marks)- C1

(b)

In most practical applications, a single transistor amplifier does not provide sufficient gain or bandwidth or will not have the correct input or output impedance matching. Thus, multistage amplifier is used to meet the combined specification of a given amplification factor, input resistance, and output resistance. In a two stage amplifier, why it is important to determine the value of Zin of the second stage? (2 marks)- C1

(c)

The input impedance of the second stage becomes load for the first stage which would affect the voltage gain of the first stage. Between the direct-coupled and capacitively coupled amplifier circuit, which of these two coupling methods would be more suitable for use in amplifying DC voltage? (2 marks)- C1 Direct coupling method. The capacitively coupled amplifier will not amplify DC voltage because the coupled capacitor will block the DC signal.

(d)

The parameters for the transistors in the amplifier circuit shown in Figure B.3 are: Q1: VT = 2V and k = 4 mA/V2 Q2: β = 250 and VBE = 0.7 V V+ = 15 V

ICQ RC = 2.4 kΩ

RB1 = 27 kΩ

vo RG1 = 1 MΩ

C1 vi

Q2

Q1 RB2 = 10 kΩ

RG2 = 270 kΩ

Zi2

Figure B.3

C2

11 SKEE 1073

i.

Calculate rπ. (5 marks)- C2 𝑉𝐺𝑆𝑄 = 𝑉𝐺 =

270𝑘 𝑅𝐺2 (15) = 3.19 𝑉 𝑉+ = 𝑅𝐺1 + 𝑅𝐺2 1𝑀 + 270𝑘

1

𝐼𝐷 = 𝑘 (𝑉𝐺𝑆 − 𝑉𝑇 )2 = 4𝑚(3.19 − 2)2 = 5.66 𝑚𝐴 𝐼𝐶 = 𝐼𝐷 = 5.66 𝑚𝐴

ii.

𝑔𝑚2 =

𝐼𝐶 5.66𝑚 = 0.218 𝑆 = 26𝑚 𝑉𝑇

𝑟𝜋 =

𝛽 250 = 1.15 𝑘Ω = 𝑔𝑚 0.218

1

1

1

Draw the ac equivalent circuit at mid-frequency. (3 marks)- C2 G

RTh1 = RG1||RG2

gm1vgs

vgs -

-

+ rπ