LAB REP 1 - DLD Lab Report 1 PDF

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DLD Lab Report 1...

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CIIT/FA19-BEE-136/LHR

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UNIVERSITY ISLAMABAD LAHORE CAMPUS SUBMITTED BY REGISTRATION NO SUBMITTED TO COURSE TITLE LAB REPORT

: : : : :

Muhammad Hamza Tariq CIIT/FA19-BEE-136/LHR Prof. Nesruminallah EEE241 – Digital Logic Design 01

CIIT/FA19-BEE-136/LHR

LAB REPORT 01 OBJECTIVE :  

To identify the basic Boolean functions of logic gates. To identify various ICs used in proteus software and to perform basic functionality of logic gates.

REQUIRED EQUIPMENT : Hardware:         

Trainer set AND Gate OR Gate NOT Gate NAND Gate NOR Gate XOR Gate Jumper wires Power supply

(74HC08) (74HC32) (74HC04) (74HC00) (74HC02) (74HC86)

Software: 

Proteus

METHDOLOGY : Lab Task 1 :     

   

Take a NAND gate. Place it on bread board and make connections accordingly as show; Take point 1,2 as inputs, 3 as output and voltage on 14 and ground on 7. Then verify the truth table; IC 7400 NAND gate

Now open proteus and Right click on the ISIS icon present on desktop and then open it. Now select gate by putting its IC number in library, also select logicstate for inputs and logicprobe for output. Now place the required things on drawing area and make connections accordingly. Now run the system by clicking on and then by entering different inputs verify the truth table.

Lab Task 2 :     

Take a AND gate. Place it on bread board and make connections accordingly as show; Take point 1,2 as inputs, 3 as output and voltage on 14 and ground on 7. Then verify the truth table; IC 7408 AND gate



Now open proteus and Right click on the ISIS icon present on desktop

Inputs A B 0 0 0 1 1 0 1 1

Output 1 1 1 0

 



and then open it. Now select gate by putting its IC number in library, also select logicstate for inputs and logicprobe for output. Now place the required things on drawing area and make connections accordingly. Now run the system by clicking on and then by entering different inputs verify the truth table.

CIIT/FA19-BEE-136/LHR Inputs Output A 0 0 1 1

B 0 1 0 1

0 0 0 1

Lab Task 3 :     

   

Take a NOT gate. Place it on bread board and make connections accordingly as show; Take point 1 as input, 2 as output and voltage on 14 and ground on 7. Then verify the truth table; IC 7404 NOT gate

Now open proteus and Right click on the ISIS icon present on desktop and then open it. Now select gate by putting its IC number in library, also select logicstate for inputs and logicprobe for output. Now place the required things on drawing area and make connections accordingly. Now run the system by clicking on and then by entering different inputs verify the truth table.

Input

Output

A 0

1

1

0

Lab Task 4 :     

   

Take a NOR gate. Place it on bread board and make connections accordingly as show; Take point 2,3 as inputs, 1 as output and voltage on 14 and ground on 7. Then verify the truth table; IC 7402 NOR gate

Now open proteus and Right click on the ISIS icon present on desktop and then open it. Now select gate by putting its IC number in library, also select logicstate for inputs and logicprobe for output. Now place the required things on drawing area and make connections accordingly. Now run the system by clicking on and then by entering different inputs verify the truth table.

A 0 0 1 1

Inputs B 0 1 0 1

Output 1 0 0 0

CIIT/FA19-BEE-136/LHR

Lab Task 5 :     

  



Take a OR gate. Place it on bread board and make connections accordingly as show; Take point 1,2 as inputs, 3 as output and voltage on 14 and ground on 7. Then verify the truth table; IC 7432 OR gate

Now open proteus and Right click on the ISIS icon present on desktop and then open it. Now select gate by putting its IC number in library, also select logicstate for inputs and logicprobe for output. Now place the required things on drawing area and make connections accordingly. Now run the system by clicking on and then by entering different inputs verify the truth table.

Inputs B 0 1 0 1

Output

A 0 0 1 1

Inputs B 0 1 0 1

Output

A 0 0 1 1

0 1 1 1

Lab Task 6 :     

  



Take a XOR gate. Place it on bread board and make connections accordingly as show; Take point 1,2 as inputs, 3 as output and voltage on 14 and ground on 7. Then verify the truth table; IC 7486 NOR gate

Now open proteus and Right click on the ISIS icon present on desktop and then open it. Now select gate by putting its IC number in library, also select logicstate for inputs and logicprobe for output. Now place the required things on drawing area and make connections accordingly. Now run the system by clicking on and then by entering different inputs verify the truth table.

0 1 1 0

POST LAB TASK : TASK 1 : U3:A 1

0

3 2

U1:A

0 0

1

U2:A 2

74HC32

1 3

74HC04

2 74HC08

U3:C 9

U1:B 3

8

U2:B 4

10

0

4 6

74HC32

5 74HC04 74HC08

U4:A 1 3

0

2 74HC86

U3:B 4 6 0

5 74HC32

CIIT/FA19-BEE-136/LHR

Truth Table : A

B

C

D

F1

F2

0

0

0

0

0

0

0

0

0

1

1

1

0

0

1

0

1

0

0

0

1

1

1

1

0

1

0

0

1

1

0

1

0

1

0

1

0

1

1

0

1

1

0

1

1

1

0

1

1

0

0

0

1

0

1

0

0

1

1

1

1

0

1

0

1

0

1

0

1

1

1

1

1

1

0

0

1

0

1

1

0

1

1

1

1

1

1

0

1

0

1

1

1

1

1

1

TASK 2 :

U1:A

0

1

U2:A 2

1 3

U3:A

2

74HC04

1 3

74HC08 2

U2:B 4

U1:B

74HC32 6

0

3

4 74HC04

Truth Table :

5 74HC08

0

CIIT/FA19-BEE-136/LHR A 0 0 1 1

Inputs B 0 1 0 1

Output 0 1 1 0

TASK 3 : U1:A

0

1

U2:A 2

1 3

74HC04

U3:A

2 74HC08

3

5

6

2

U2:B 4

U1:B

U1:C

1

74HC32

1

74HC04

6

0

3

4 74HC04

5 74HC08

Truth Table :

A 0 0 1 1

Inputs B 0 1 0 1

Output 1 0 0 1

CONCULUSION : This experiment leads to the description of logic gates; NAND, AND, NOT, NOR, OR and XOR gate. It shows that in every IC there are 4 logic gates except for NOT Gate IC, as it has 6 NOT gates. It also shows that at which terminal the inputs are given to the circuit and from which terminal output is taken (it is almost same for every IC except for NOR gate IC). It shows that an AND gate gives 1(ON) only when both inputs are 1 because of the dot product in their equation (X = A.B), an OR gate gives 0 only when both inputs are 0 because of the summation sign in their equation (X = A+B) and NAND and NOR gates are inverse of these gates respectively and a NOT gate just inverses the input. It also describes the Exclusive OR and NOR gate. It shows that XOR gate gives 1 when both inputs are different and an XNOR gate is just inverse of XOR. It also shows that how XOR and XNOR gates can be build using basic AND, OR and NOT gates only....