Lab Report Multiplexer Demultiplexer and Encoder Decoder PDF

Preview

Summary

Lab report for Multiplexer, Demultiplexers and Encoder Decoder...

Description

EET130 Digital Systems Instructor: Professor Gill

Lab 4 Part 2 Multiplexer/Demultiplexer and Encoder/Decoder

Student Name(s):

Levi Parillo

Honor Pledge: I pledge to support the Honor System of ECPI. I will refrain from any form of academic dishonesty or deception, such as cheating or plagiarism. I am aware that as a member of the academic community, it is my responsibility to turn in all suspected violators of the honor code. I understand that any failure on my part to support the Honor System will be turned over to a Judicial Review Board for determination. I will report to the Judicial Review Board hearing if summoned.

Levi Parillo

Date:

/18/2021

Adding your name here constitutes your agreement to the Honor Pledge as stated.

Cont e nt s Abstract.......................................................................................................................................................3 Introduction................................................................................................................................................. 3 Procedures...................................................................................................................................................3 Data.............................................................................................................................................................6 Conclusion...................................................................................................................................................8 References...................................................................................................................................................8

Abstract In this experiment, there will be practice constructing and analyzing Multiplexer, Demultiplexer, Encoder and Decoder circuits. These all correspond to one or more types of logic gates such as AND, NOR and universal gates.

Introduction MULTIPLEXER: Multiplexer means transmitting a large number of information units over a smaller number of channels or lines. A digital multiplexer is a combinational circuit that selects binary information from one of many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines. Normally there are 2 n input line and n selection lines whose bit combination determine which input is selected. DEMULTIPLEXER: The function of Demultiplexer is in contrast to multiplexer function. It takes information from one line and distributes it to a given number of output lines. For this reason, the demultiplexer is also known as a data distributor. Decoder can also be used as demultiplexer. In the 1: 4 demultiplexer circuit, the data input line goes to all of the AND gates. The data select lines enable only one gate at a time and the data on the data input line will pass through the selected gate to the associated data output line. ENCODER: An encoder is a digital circuit that perform inverse operation of a decoder. An encoder has 2 n input lines and n output lines. In encoder the output lines generates the binary code corresponding to the input value. In octal to binary encoder it has eight inputs, one for each octal digit and three output that generate the corresponding binary code. In encoder it is assumed that only one input has a value of one at any given time otherwise the circuit is meaningless. It has an ambiguila that when all inputs are zero the outputs are zero. The zero outputs can also be generated when D0 = 1. DECODER: A decoder is a multiple input multiple output logic circuit which converts coded input into coded output where input and output codes are different. The input code generally has fewer bits than the output code. Each input code word produces a different output code word i.e there is one to one mapping can be expressed in truth table. In the block diagram of decoder circuit, the encoded information is present as n input producing 2 n possible outputs. 2n output values are from 0 through out 2n – 1.

Procedures

1. Construct the circuit shown in Figure 1 using components listed in parts list for 4:1 multiplexer. 2. Set selection inputs (S1 and S0) and data inputs (D0, D1, D2 and D3) as shown in Table 1 by changing SPDT switches and observe output using a digital probe. 3. Write down “observed output” in Table 1. Validate if “observed output” is same as “predicted output”. 4. Construct the circuit shown in Figure 2 using components listed in parts list for 1:4 demultiplexer. 5. Set inputs S1, S0, and I/P as shown in Table 2 by changing SPDT switches and observe outputs using digital probes. 6. Write down “observed outputs” in Table 2. Validate if “observed outputs” are same as “predicted output”.

Figure 1: Circuit diagram for 4:1 multiplexer

Figure 2: Circuit diagram for 1:4 demultiplexer

7. Construct the circuit shown in Figure 3 using components listed in parts list for the encoder. 8. Set inputs (Y1, Y2, Y3, Y4, Y5, Y6 and Y7) as shown in Table 3 by changing SPDT switches and observe output using digital probes. 9. Construct the circuit shown in Figure 4 using components listed in parts list for decoder. 10. Set inputs E, A, and B as shown in Table 4 by changing SPDT switches and observe outputs using digital probes. 11. Write down “observed outputs” in Table 4.

Figure 3: Circuit diagram for encoder

Figure 4: Circuit diagram for decoder

Da t a Table 1: Results for 4:1 multiplexer S1

S0

D0

D1

D2

D3

Predicted Output

Observed output

0

0

1

0

0

0

D0

D0

0

1

0

1

0

0

D1

D1

1

0

0

0

1

0

D2

D2

1

1

0

0

0

1

D3

D3

Table 2: Results for 1:4 demultiplexer

Input

Output Predicted

S0

S1

Observed

I/P D0

D1

D2

D3

D0

D1

D2

D3

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

1

0

0

0

1

0

1

0

0

0

1

0

0

0

1

0

0

1

1

0

1

1

0

0

1

1

0

1

0

0

1

0

0

1

1

0

0

1

1

0

1

1

0

1

0

1

0

1

0

1

1

0

1

1

0

1

1

1

0

1

1

1

1

1

1

1

1

1

1

1

1

Table 3: Results for encoder

Input

Observed output

Y1

Y2

Y3

Y4

Y5

Y6

Y7

1

0

0

0

0

0

0

0

0

1

0

1

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

1

0

0

0

0

1

0

0

0

1

0

0

0

0

0

0

1

0

0

0

1

0

0

0

0

0

0

1

0

1

0

0

0

0

0

0

0

0

1

1

0

0

Table 4: Results for decoder

Input

Output

E

A

B

D0

D1

D2

D3

1

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

1

1

0

1

0

0

1

0

0

0

1

1

0

1

1

0

Conclusion Throughout this experiment, one is able to understand the different functions of Multiplexer and Demultiplexer circuits. There were also encoder and decoder circuits created and analyzed. By understanding these different types of circuits/functions, one is able to further understand how gates work in different applications.

References Floyd, T. L. Digital Fundamentals. [VitalSource Bookshelf]. Retrieved from https://bookshelf.vitalsource.com/#/books/9780134880068/...