Lab3 answers to questions PDF

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Practical experiment performed in electronics lab solved question of lab3...

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Answer the following questions briefly on QMPlus. 1. Copy the single line of code (not a function call) that causes the delay at the end of the cycle. Explain what the code does briefly. waitSysTickCounter(10) causes a delay at the end of cycle. When we enable it, it counts down with each input clock pulse, this timer decrements when it is clocked and after the counter reaches zero it reload itself in 24 bit register and generate Systick exception. It runs every second.

2. How many tasks are there in the provided program? Briefly describe the behaviour of each task and why they can run independently (without any interaction) There are two tasks in the given program. First task is to flash the red LED and Task 2 to flash green LED. These two tasks are independent to see the cyclic execution step by step and to determine the behavior of system with interrupts and concurrency issues.

3. Copy the one line of code (not a function call) used to enable interrupts on the GPIO input for the button. Explain each element of the code. NVIC_EnableIRQ(PORTD_IRQn); it means if any enabled interrupts have been requested, the NVIC will select the one that have highest priority and directs that to CPU to start executing its ISR. In the code, the switch is connected to port. When a switch changes, the port control module signals the NVIC (nested vector interrupt control) that will create interrupt request to the CPU. And this interrupt request will save in the vector table so that CPU can read it. Specifically, CPU will read the address and load it to the PC so the ISR (interrupt service routine) can execute. 4. What is the name of the interrupt handler function configured to trigger when a transition occurs on the GPIO input (i.e. when the button is pressed)? Describe the steps taken in the interrupt handler (but do not list the code). ISFR (Interrupt service flag register) is configured to trigger when a transition occurs on the GPIO input when button presses because the ISR is need to determine what the switch new value is or most likely to match the entry in the vector table, then ISR needs to read the ISFR in PORTD to determine which bit triggered the interrupt. Finally, the interrupt status flag register is clear by writing all in ones to PORTD.

Question about concepts [8 marks] Answer the following questions concisely (up to approx 20 words each): 1. In activity 2, what proportion of the cycle is spent executing user code, rather

than waiting? a. Give the time you measure for the execution of the code and the ratio between this and the cycle time. The execution time was found to be 4 μ s while the cycle time is 20ms from the oscilloscope. So the ratio of the execution time to cycle time would be: Execution time CycleTIme

=

4 μs 20 ms

= 2 × 10-4

b. The execution time is not always the same. Explain why it varies and why the cycle time nevertheless remains the same, and does not depend on the execution time of the code. Because interrupts causes delay in the system, it can happen that Task 1 takes longer time to execute than Task 2 or may be possible that Task 2 get longer than Task 1. Possible concurrency errors can occur to have delay in either of the task to execute set of instructions due to which cycle time varies. It depends on because the processor keeps on requesting data, then it takes time to load data from the program or other memory allocations in the MCU. Usually, it depends on the complexity of the task to perform specific set of instructions within the loop. Therefore, it does not remain the same. 2. In activity 3, record the value you measured for the interrupt reaction time. a. Assuming a core clock speed of 20.97 MHz (and bus speed 50% of this), calculate the number of instructions that can be executed in this time (assuming 1 instruction per cycle). Thecl ockspeedi s20. 97MHzar ound21MHzandt hebussspeedi s50% oft hi sval ue,meanst hat t hebusr unhal foft hespeedoft heCPUi t sel f ,t hent hehal foft hecl ockspeedwoul dbe10. 97MHz Thei nst r uct i onspercy cl eonl ydependsoncor ecl ockspeed.The bus speed is 50% means that computer completed 11 instructions. And the number of cycles executed by 10.97 MHz would be 10970000 cycles per second that around 11 million cycles per second.

First I Divide the

no of instruction execution time

As we know, 1MHz = 1 Million cycles per second CPI (instructions per cycle) = 1 The bus speed is 50% means that computer completed 1 million instructions in 0.5 seconds.

So,

No of cycles per second No . of cycles per instruction

÷ 1 million = MIPS

12MHz = 12 million cycles per second. Number of cycles per instruction = 1

b. Count the number of assembly code instructions executed in the interrupt handler, until the output is changed. Writing to the GPIO ports takes twice as long, so count this as two instructions. (You could use the debugger to do this). The number of assembly code instructions that executed in the interrupt handler are 11 instructions.

c. Using a) and b) estimate the time taken to react to the interrupt request. Describe how your estimate is made. Clock cycles to respond to interrupt = 11 instructions executed in Interrupt handler clock frequency = 10.97 MHz. So, The time taken to react to the interrupt request is 1/11 = 91 ns....