Title | Question Bank-Unit4 - Prof. Madura |
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Course | Electronic Design Automation- Verilog to Routing |
Institution | PES University |
Pages | 1 |
File Size | 37.6 KB |
File Type | |
Total Downloads | 87 |
Total Views | 140 |
Prof. Madura...
Question Bank 1. Identify the P/NP and NPN class of functions for 3-input functions 2. Assuming base functions to be 2-input AND gates and inverters, decompose, partition and identify covers for the following functions: a. 10-input OR gates b. 2-bit Full adder c. Odd parity generator for an input of 8 bits. d. 4:1 multiplexer e. 8:3 decoder 3. Assume a cost proportional to the number of inputs, minimize the total cost for the technology mapping the following functions onto 2/3 input NAND gates a. 4-bit up/down-counter b. 4-bit Gray code counter 4. Identify the most appropriate Boolean 2-input NPN class for technology mapping the following circuits: a. 8:1 MUX b. Odd bit parity generator for a message length of 16....