Tutorial 11-COEN212 PDF

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Tutorial Work week 11...

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Tutorial 11 COEN 212 6.6 Design a four-bit shift register (not a universal shift register) with parallel load using D flip-flops. (See Figs. 6.2 and Fig. 6.3.) There are two control inputs: shift and load. When shift=1, the content of the register is shifted toward A3 by one position. New data are transferred into the register when load=1 and shift=0. If both control inputs are equal to 0, the content of the register does not change.

Solution Shift load

Q

1

0

serial input

0

1

𝐼0

0

0

No change

6.8 The serial adder of Fig. 6.6 uses two four-bit registers. Register A holds the binary number 0101 and register B holds 0111. The carry flip-flop is initially reset to 0. List the binary values in register A and the carry flip-flop after each shift.

Solution: A = 0010, 0001, 1000, 1100. Carry = 0, 1, 1, 0 #0 #1 #2 #3

x 1 0 1 0

y 1 1 1 0

J 1 0 1 0

K 0 0 0 1

C 0 1 1 0

S 0 0 1 1

Reg A 0101 → 0010 0010 → 0001 0001 → 1000 1000 → 1100

6.10 Design a serial 2’s complementer with a shift register and a flip-flop. The binary number is shifted out from one side and its 2’s complement shifted into the other side of the shift register Solution...