HET202-Exam-2006 - Grade: good PDF

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Swinburne University of Technology HIGHER EDUCATION DIVISION Examinations: Teaching Period 2, 2006, Paper 1 of 1 Faculty of Engineering and Industrial Sciences

Full Subject Title: Digital Electronics Design Subject Codes: HET202 STUDENT'S NAME _________________________________________________ I.D. No.__________

Duration: 3 hours, 0 mins.

Percentage of overall assessment of this paper : 70%

Reading Time: 15 mins. Instructions to Candidates Materials y

Calculators not pre-programmed by the user. Answering Requirements

y y y y y y y

Attempt all questions. Answers to questions 1 through 12 must be entered on the attached answer sheet. Failure to do so will result in a 2-mark penalty for that section. Answers to questions 13 onwards must be done in the workbooks provided. Show all workings for these questions. Start EACH question (not each part of a question) on a new page in the workbook. Place the question number in the box at the top right of each page. Do not use red ink in answering questions. The entire exam paper is to be enclosed inside the front cover of the workbook(s) and handed in at the end of the examination. Additional Information

y

Total Marks: 60 Attachments at end of examination paper

y y y y

Rules and theorems of Boolean algebra. Example VHDL code for guidance Miscellaneous information Answer sheet for questions 1 through 12.

SWINBURNE UNIVERSITY OF TECHNOLOGY FACULTY OF ENGINEERING AND INDUSTRIAL SCIENCES

HET202 Digital Electronics Design Examination, Teaching Period 2, 2006

Section 1 – Multiple choice Q1) to Q12) In this section choose the alternative that best answers the question. Multiple choices will be taken to be no attempt. NOTE: Your answers must be transferred to the answer sheet at the end of this paper. Failure to do so will result in a 2-mark penalty for this section. All questions are worth equal marks: +2 correct, -1/2 incorrect, 0 for no attempt A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

Q1) The Boolean expression (a.b+c)(a.b+d) may be simplified to: a) 0

Q2)

b) a.b+c

c) a.b+c.d

d) 1

Enter the following expression into a K-map. ΠM(3,6,7,8,9,10,11,12,14) Which of the following is not an essential prime implicant of the expression?

F(a,b,c,d) =

a)

a'c'

b)

bc'd

c)

abd

d)

a'b'd'

Q3) Using DeMorgan’s theorem 3 times to obtain the complement of A.B+C'.D gives: a) A'.B'+C.D'

b) (A+B)(C+D')

c) (A'+B')(C+D')

d) none of these

Q4) The expression abc'+b'c when converted to simplified POS is: a) (a'+b'+c)(b+c')

b) (a+b')(b'+c')(b+c)

c) (a+b+c’)(b'+c)

d) none of these

Q5) The decimal number 39 in unsigned binary and 8-bit 2’s complement notation is: a) 1001112 , 101001112

b) 1001112 , 110110012

c) 1001112 , 110110002

d) 1001112 , 001001112

Q6) The 2’s complement expression 1101112 a) 1101012

b) 1110012

c) 0110012

d) 1110102

Q7) Given F(a,b,c) false? a) F(a,b,c) = c) F'(a,b,c) =

=

ΠM(4,5,7).

ΠM(4,5,7) Σm(4,5,7)

Which

- 102

gives:

of the following is

b) F(a,b,c) = d) F(a,b,c) =

Σm(0,1,2,3,6) ΠM(0,1,2,3,6)

HET202 – Digital Electronics Design Examination, Teaching Period 2, 2006

page 2 of 8

Q8) Which sum term may be added to the expression F = (w+y)(x'+y') to eliminate the static hazard? a) (w’+y)

b) (w’+x)

c) (x+y’)

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

d) (w+x’)

Q9) Given that A="00101101" and B="10011", determine the value of: F ySignal ); bSignal...