Especificación de circuito integrado Philips 873334 PDF

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INTEGRATED CIRCUITS

DEVICE SPECIFICATION

TDA935X/6X/8X PS/N2 series TV signal processor-Teletext decoder with embedded -Controller Tentative Device Specification Version: 2.8

2001 Jan 18 Previous date: 2000 Nov 29

Philips Semiconductors

Tentative Device Specification

TV signal processor-Teletext decoder with embedded -Controller

TDA935X/6X/8X PS/N2 series

GENERAL DESCRIPTION The various versions of theTDA935X/6X/8X PS/N2 series combine the functions of a TV signal processor together with a -Controller and US Closed Caption decoder. Most versions have a Teletext decoder on board. The Teletext decoder has an internal RAM memory for 1or 10 page text. The ICs are intended to be used in economy television receivers with 90 and 110 picture tubes. The ICs have supply voltages of 8 V and 3.3 V and they are mounted in S-DIP envelope with 64 pins. The features are given in the following feature list. The differences between the various ICs are given in the table on page 4.

FEATURES

RGB control circuit with ‘Continuous Cathode Calibration’, white point and black level offset adjustment so that the colour temperature of the dark and the light parts of the screen can be chosen independently.

TV-signal processor Multi-standard vision IF circuit with alignment-free PLL demodulator

Linear RGB or YUV input with fast blanking for external RGB/YUV sources. The Text/OSD signals are internally supplied from the -Controller/Teletext decoder

Internal (switchable) time-constant for the IF-AGC circuit A choice can be made between versions with mono intercarrier sound FM demodulator and versions with QSS IF amplifier.

Contrast reduction possibility during mixed-mode of OSD and Text signals

The mono intercarrier sound versions have a selective FM-PLL demodulator which can be switched to the different FM sound frequencies (4.5/5.5/6.0/6.5 MHz). The quality of this system is such that the external band-pass filters can be omitted.

Horizontal synchronization with two control loops and alignment-free horizontal oscillator Vertical count-down circuit Vertical driver optimized for DC-coupled vertical output stages

Source selection between ‘internal’ CVBS and external CVBS or Y/C signals

Horizontal and vertical geometry processing

Integrated chrominance trap circuit

Horizontal and vertical zoom function for 16 : 9 applications

Integrated luminance delay line with adjustable delay time

Horizontal parallelogram and bow correction for large screen picture tubes

Picture improvement features with peaking (with variable centre frequency and positive/negative overshoot ratio) and black stretching

Low-power start-up of the horizontal drive circuit

Integrated chroma band-pass filter with switchable centre frequency Only one reference (12 MHz) crystal required for the -Controller, Teletext- and the colour decoder PAL/NTSC or multi-standard colour decoder with automatic search system Internal base-band delay line 2001 Jan 18

2

Philips Semiconductors

Tentative Device Specification

TV signal processor-Teletext decoder with embedded -Controller

TDA935X/6X/8X PS/N2 series

Display

-Controller 80C51 -controller core standard instruction set and timing

Teletext and Enhanced OSD modes

1 s machine cycle

Serial and Parallel Display Attributes

32 - 128Kx8-bit late programmed ROM

Single/Double/Quadruple Width and Height for characters

Features of level 1.5 WST and US Close Caption

3 - 12Kx8-bit Auxiliary RAM (shared with Display and Acquisition)

Scrolling of display region

Interrupt controller for individual enable/disable with two level priority

Variable flash rate controlled by software

Two 16-bit Timer/Counter registers

Enhanced display features including overlining, underlining and italics

One 16 bit Timer with 8-bit Pre-scaler

Soft colours using CLUT with 4096 colour palette

WatchDog timer Auxiliary RAM page pointer

Globally selectable scan lines per row (9/10/13/16) and character matrix [12x10, 12x13, 12x16 (VxH)]

16-bit Data pointer

Fringing (Shadow) selectable from N-S-E-W direction

Stand-by, Idle and Power Down (PD) mode

Fringe colour selectable

14 bits PWM for Voltage Synthesis Tuning

Meshing of defined area

8-bit A/D converter

Contrast reduction of defined area

4 pins which can be programmed as general I/O pin, ADC input or PWM (6-bit) output

Cursor Special Graphics Characters with two planes, allowing four colours per character

Data Capture

32 software redefinable On-Screen display characters

Text memory for 0, 1 or 10 pages

4 WST Character sets (G0/G2) in single device (e.g. Latin, Cyrillic, Greek, Arabic)

In the 10 page versions inventory of transmitted Teletext pages stored in the Transmitted Page Table (TPT) and Subtitle Page Table (SPT)

G1 Mosaic graphics, Limited G3 Line drawing characters

Data Capture for US Closed Caption

WST Character sets and Closed Caption Character set in single device

Data Capture for 525/625 line WST, VPS (PDC system A) and Wide Screen Signalling (WSS) bit decoding Automatic selection between 525 WST/625 WST Automatic selection between 625 WST/VPS on line 16 of VBI Real-time capture and decoding for WST Teletext in Hardware, to enable optimized -processor throughput Automatic detection of FASTEXT transmission Real-time packet 26 engine in Hardware for processing accented, G2 and G3 characters Signal quality detector for video and WST/VPS data types Comprehensive teletext language coverage Full Field and Vertical Blanking Interval (VBI) data capture of WST data

2001 Jan 18

3

90

90

90 110 90

90 110 110 110 110 90

90

90

90

90 110 110 110 110 90 110 110

Mono intercarrier multi-standard sound demodulator (4.5 - 6.5 MHz) with switchable centre frequency Audio switch Automatic Volume Levelling Automatic Volume Levelling or subcarrier output (for comb filter applications) QSS sound IF amplifier with separate input and AGC circuit AM sound demodulator without extra reference circuit PAL decoder SECAM decoder

4

NTSC decoder Horizontal geometry (E-W) Horizontal and Vertical Zoom 32- 32- 32- 32- 64- 64- 64- 64- 64- 64- 64- 64- 16- 16- 16- 16- 16- 16- 16- 16- 16- 1664 k 64 k 64 k 64 k 128k 128k 128k 128k 128k 128k 128k 128k 64 k 64 k 64 k 64 k 64 k 64 k 64 k 64 k 64 k 64 k

User RAM size Teletext

1k 1k 1k 1k 2k 2k 2k 2k 2k 2k 2k 2k 1k 1 1 1 1 10 10 10 10 10 10 10 10 page page page page page page page page page page page page

Closed captioning

1k

1k

1k

1k

1k

1k

1k

1k

1k

Tentative Device Specification

TDA935X/6X/8X PS/N2 series

ROM size

Philips Semiconductors

9350 9351 9352 9353 9360 9361 9362 9363 9364 9365 9366 9367 9380 9381 9382 9383 9384 9385 9386 9387 9388 9389

TV signal processor-Teletext decoder with

IC VERSION (TDA) TV range

embedded -Controller

2001 Jan 18

FUNCTIONAL DIFFERENCE BETWEEN THE VARIOUS IC VERSIONS

Philips Semiconductors

Tentative Device Specification

TV signal processor-Teletext decoder with embedded -Controller

TDA935X/6X/8X PS/N2 series

QUICK REFERENCE DATA SYMBOL

PARAMETER

MIN.

TYP.

MAX.

UNIT

Supply VP

supply voltages

8.0/3.3

V

IP

supply current

tbf

mA

Input voltages ViVIFrms) ViSIF(rms) ViAUDIO(rms) ViCVBS(p-p) ViCHROMA(p-p)

video IF amplifier sensitivity (RMS value) QSS sound IF amplifier sensitivity (RMS value)

75 60

V V

external audio input (RMS value)

500

mV

external CVBS/Y input (peak-to-peak value)

1.0

V

ViRGB(p-p)

external chroma input voltage (burst amplitude) (peak-to-peak value) RGB inputs (peak-to-peak value)

ViYIN(p-p)

luminance input signal (peak-to-peak value)

1.4

V

ViUVIN(p-p)

U/V input signal (peak-to-peak value)

1.33/1.05

V V

0.3

V

0.7

V

Output signals Vo(IFVO)(p-p)

demodulated CVBS output (peak-to-peak value)

2.5

Vo(QSSO)(rms)

sound IF intercarrier output in QSS versions (RMS value)

100

Vo(AMOUT)(rms) demodulated AM sound output in QSS versions (RMS value) Io(AGCOUT) tuner AGC output current range

mV

500 0

RGB output signal amplitudes (peak-to-peak value)

mV 5

2.0

mA V

VoRGB(p-p) IoHOUT

horizontal output current

10

mA

IoVERT IoEWD

vertical output current (peak-to-peak value) EW drive output current

1 1.2

mA mA

2001 Jan 18

5

CVBS/Y

24

VIDEO SWITCH

42

VIDEO IDENT.

CHROMA 43

35

DEEMPHASIS

60 55 59

58 57

80C51 CPU

I/O PORTS (4x)

1/10 PAGE MEMORY

CVBS ROM/RAM

VST OUT

TELETEXT ACQUISITION

SYNC

6

REF

DELAY LINE

G

B BL

OSD/TEXT INSERT CCC

R G B RGB/YUV INSERT

H-DRIVE

H/V SYNC SEP.

V-DRIVE +

2nd LOOP H-OSC. + PLL

19

H

V

H-SHIFT

Y (EW GEOMETRY) U

GEOMETRY

RGB/YUV MATRIX SATURATION YUV/RGB MATRIX

V 34

16

33

HOUT

25

26

22

21

V-DRIVE

36

EHTO

(20)

EWD

46 47 48 45

R/V G/Y B/U BL

Fig. 1 Block diagram TDA935X/6X8X PS/N2 with mono intercarrier sound demodulator

RO

52

GO

53

B0

49

BCLIN

50

BLKIN

Tentative Device Specification

17

51

TDA935X/6X/8X PS/N2 series

WHITE-P. ADJ.

18

15

R

CONTR/BRIGHTN

30

14

DISPLAY

COR

LUMA DELAY PEAKING BLACK STRETCH

BASE-BAND

DECODER

TELETEXT/OSD V

41

39

54 56 61

H AGC CIRCUIT

PAL/SECAM/NTSC

+8V

12

9

VST PWM-DAC

REF

(32)

4

I/O PORTS

NARROW BAND PLL DEMODULATOR

VIDEO FILTERS

13

3

I2C-BUS TRANSCEIVER

ENHANCED

AUDIO SWITCH (AVL) VOLUME CONTROL

2

ADC IN (4x)

LED OUT (2x)

VPE

RESET 44

5-8

(20) 29 28 (32)

10/11

(32) 31

VISION IF ALIGNMENT-FREE PLL DEMOD. AGC/AFC VIDEO AMP.

40

AUDOUT

AUDEXT

SNDIF 38

1+62-64

23 IFIN

37

Philips Semiconductors

27

+3.3 V

TV signal processor-Teletext decoder with embedded -Controller

TUNERAGC

SCL SDA

BLOCK DIAGRAM

2001 Jan 18

SOUND TRAP

24

VISION IF ALIGNMENT-FREE PLL DEMOD. AGC/AFC VIDEO AMP.

60 55 59

QSS SOUND IF

58 57

80C51 CPU

QSS MIXER

3

I/O PORTS (4x)

ADC IN (4x)

VST OUT 4

I2C-BUS TRANSCEIVER VST PWM-DAC

ENHANCED

AGC

2

5-8

31

LED OUT (2x)

RESET

(35) 44 (32)

VPE

AMOUT

SIFIN

28 29

10/11

(35)

QSSOUT/AMOUT

AUDEXT 38

+3.3 V

1+62-64

23 IFIN

37

(20)

27

SCL SDA

12

9

54 56 61

10 PAGE MEMORY

I/O PORTS

AM DEMODULTOR REF

40

VIDEO SWITCH

42

VIDEO IDENT.

CHROMA 43

VIDEO FILTERS

CVBS/Y

H

LUMA DELAY CVBS

PEAKING

ROM/RAM

TELETEXT ACQUISITION

BLACK STRETCH

7

SYNC BASE-BAND

PAL/SECAM/NTSC DECODER

DISPLAY

R

COR

REF

13

(32)

TELETEXT/OSD V

51

RO

52

GO

DELAY LINE

CCC

41

R G B

39

H/V SYNC SEP.

14

H-OSC. + PLL

RGB/YUV INSERT

H-DRIVE

19

H

Y

V-DRIVE +

2nd LOOP

V

H-SHIFT

EW GEOMETRY

16

33

HOUT

25

26

22

21

V-DRIVE

36

EHTO

YUV/RGB MATRIX

(20)

EWD

46 47 48 45

R/V G/Y B/U BL

Fig. 2 Block diagram TDA 935X/6X/8X PS/N2 with QSS IF sound channel

BO

49

BCLIN

50

BLKIN

Tentative Device Specification

34

SATURATION

U

GEOMETRY

V 17

RGB/YUV MATRIX

53

TDA935X/6X/8X PS/N2 series

WHITE-P. ADJ.

18

15

B BL

OSD/TEXT INSERT

30

+8V

G

CONTR/BRIGHTN

Philips Semiconductors

TUNERAGC

TV signal processor-Teletext decoder with embedded -Controller

2001 Jan 18

SOUND TRAP

Philips Semiconductors

Tentative Device Specification

TV signal processor-Teletext decoder with embedded -Controller

TDA935X/6X/8X PS/N2 series

PINNING SYMBOL P1.3/T1 P1.6/SCL P1.7/SDA P2.0/TPWM P3.0/ADC0 P3.1/ADC1 P3.2/ADC2 P3.3/ADC3 VSSC/P P0.5 P0.6 VSSA SECPLL VP2 DECDIG PH2LF PH1LF GND3 DECBG AVL/EWD (1) VDRB VDRA IFIN1 IFIN2 IREF VSC TUNERAGC AUDEEM/SIFIN1(1) DECSDEM/SIFIN2(1) GND2 SNDPLL/SIFAGC(1) AVL/SNDIF/REF0/ AMOUT(1) HOUT FBISO AUDEXT/ QSSO/AMOUT(1) EHTO PLLIF IFVO/SVO VP1 CVBSINT GND1 CVBS/Y CHROMA AUDOUT /AMOUT(1) 2001 Jan 18

PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

DESCRIPTION port 1.3 or Counter/Timer 1 input port 1.6 or I2C-bus clock line port 1.7 or I2C-bus data line port 2.0 or Tuning PWM output port 3.0 or ADC0 input port 3.1 or ADC1 input port 3.2 or ADC2 input port 3.3 or ADC3 input digital ground for -Controller core and periphery

33 34 35

port 0.5 (8 mA current sinking capability for direct drive of LEDs) port 0.6 (8 mA current sinking capability for direct drive of LEDs) analog ground of Teletext decoder and digital ground of TV-processor SECAM PLL decoupling 2nd supply voltage TV-processor (+8V) decoupling digital supply of TV-processor phase-2 filter phase-1 filter ground 3 for TV-processor bandgap decoupling Automatic Volume Levelling /East-West drive output vertical drive B output vertical drive A output IF input 1 IF input 2 reference current input vertical sawtooth capacitor tuner AGC output audio deemphasis or SIF input 1 decoupling sound demodulator or SIF input 2 ground 2 for TV processor narrow band PLL filter /AGC sound IF Automatic Volume Levelling / sound IF input / subcarrier reference output /AM output (non controlled) horizontal output flyback input/sandcastle output external audio input /QSS intercarrier out /AM audio output (non controlled)

36 37 38 39 40 41 42 43 44

EHT/overvoltage protection input IF-PLL loop filter IF video output / selected CVBS output main supply voltage TV-processor (+8 V) internal CVBS input ground 1 for TV-processor external CVBS/Y input chrominance input (SVHS) audio output /AM audio output (volume controlled) 8

Philips Semiconductors

Tentative Device Specification

TV signal processor-Teletext decoder with embedded -Controller SYMBOL

PIN

INSSW2 R2/VIN G2/YIN B2/UIN BCLIN BLKIN RO GO BO VDDA VPE VDDC OSCGND XTALIN XTALOUT RESET VDDP P1.0/INT1 P1.1/T0 P1.2/INT0

45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

TDA935X/6X/8X PS/N2 series DESCRIPTION

2nd RGB / YUV insertion input 2nd R input / V (R-Y) input 2nd G input / Y input 2nd B input / U (B-Y) input beam current limiter input / (V-guard input, note 2) black current input / (V-guard input, note 2) Red output Green output Blue output analog supply of Teletext decoder and digital supply of TV-processor (3.3 V) OTP Programming Voltage digital supply to core (3.3 V) oscillator ground supply crystal oscillator input crystal oscillator output reset digital supply to periphery (+3.3 V) port 1.0 or external interrupt 1 input port 1.1 or Counter/Timer 0 input port 1.2 or external interrupt 0 input

Note 1. The function of pin 20, 28, 29, 31, 32, 35 and 44 is dependent on the IC version (mono intercarrier FM demodulator / QSS IF amplifier and East-West output or not) and on some software control bits. The valid combinations are given in table 1. 2. The vertical guard function can be controlled via pin 49 or pin 50. The selction is made by means of the IVG bit in subaddress 2BH. Table 1

Pin functions for various versions

IC version East-West Y/N CMB1/CMB0 bits AM bit Pin Pin Pin Pin Pin Pin Pin

20 28 29 31 32 35 44

FM-PLL version 00

N 01/10/11

QSS version Y

00

01/10/11

00

N 01/10/11 0 1

00

Y 01/10/11 0 1

AVL

SNDIF(1)

EWD AVL EWD AUDEEM SIFIN1 DECSDEM SIFIN2 SNDPLL SIFAGC REFO(2) AVL/SNDIF(1) REFO(2) AMOUT REFO(2) AMOUT REFO(2) AUDEXT AUDEXT QSSO AMOUT AUDEXT QSSO AMOUT AUDOUT controlled AM or audio out

Note 1. When additional (external) selectivity is required for FM-PLL system pin 32 can be used as sound IF input. This function is selected...